Abstract: A differential amplifier with improved linearity. The amplifier includes a circuit comprised of two emitter-coupled pairs, each pair being formed by two transistors, with connections between corresponding collectors, and constant voltage sources for producing offsets between corresponding bases of the emitter-coupled pairs. The improved linearity is achieved by obtaining outputs as sums of collector currents with offsets. The emitter areas of the transmitters can be of the minimum size available. This feature, when combined with the use of emitter-followers as the constant voltage sources, enable the differential amplifier to achieve a high S/N ratio, a good high-frequency characteristic, a high direct current gain, and a high-speed operation capability along with the improved linearity. In addition, the linearity is further improved by using additional diodes connected to the transistors.