Abstract: A circuit and method for generating a write enable pulse that is independent of the clock duty cycle and the clock frequency. The circuit includes a pulse generator for generating a pulse in response to a clock signal and a write enable signal generator for generating a write enable pulse. The pulse tracks the leading edge of the clock signal. A logic circuit is coupled to the pulse generator and the write enable signal generator to generate the write enable pulse by combining the pulse and the write enable signal.
Type:
Grant
Filed:
April 20, 2001
Date of Patent:
December 17, 2002
Assignees:
Sun Microsystems, LSI Logic Corporation
Abstract: An integrated circuit device including an integrated circuit die having at least a first and a second heat-generating components formed thereon, and a heat dissipation structure thermally coupled to the die to dissipate heat generated by the components. The heat dissipating characteristics of the heat dissipation structure are tailored to match the heat generated by each of the first and second components.