Abstract: An image memory write control apparatus includes an image memory unit which is divided into a plurality of block memories. For each of the block memories there are provided a double buffer memory and a timing control circuit. Based on the contents of lower digits of coordinate data supplied from a linear interpolation operation unit, there are generated control signals for designating the functions of the two memory planes of each of the double buffer memories, and for selecting the block memories for receipt of image data from a designated memory plane.