Abstract: Techniques for implementing virtual machine instructions suitable for execution in virtual machines are disclosed. The inventive virtual machine instructions can effectively represent the complete set of operations performed by the conventional Java Bytecode instruction set. Moreover, the operations performed by conventional instructions can be performed by relatively fewer inventive virtual machine instructions. Thus, a more elegant, yet robust, virtual machine instruction set can be implemented. This, in turn, allows implementation of relatively simpler interpreters as well as allowing alternative uses of the limited 256 (28) Bytecode representation (e.g., a macro representing a set of commands). As a result, the performance of virtual machines, especially, those operating in systems with limited resources, can be improved by using the inventive virtual machine instructions.

Abstract: Methods and apparatus for registering a mobile device such as a mobile node or mobile router with a Home Agent in an asymmetric link environment. A Foreign Agent associates each of one or more interfaces of the Foreign Agent with a different care-of address. An agent advertisement including the care-of address for the one or more interfaces of the Foreign Agent is then sent via one or more uplinks. A registration request is received via a downlink router. The registration request identifies a care-of address associated with one of the one or more interfaces of the Foreign Agent. One of the interfaces identified by the care-of address is ascertained, thereby identifying the interface to which the mobile device has roamed. The registration request is forwarded to the Home Agent. A registration reply is received from the Home Agent. The registration reply is then forwarded to the mobile device via the ascertained interface.

Abstract: A gaming system is disclosed. The gaming system includes at least two gaming components. Each gaming component includes a controller and a communications interface. The gaming system also includes a communication link to allow the controllers of the gaming components to communicate with other controllers of other gaming components on a peer-to-peer basis through the communication interfaces.

Abstract: A method and apparatus used to step and correct the position of raster lines in a sinusoidal or zig-zag deflection system. By combining the magnetic flux generated with a rotation “twister” coil and a vertical deflection coil, scan lines can be uniformly spaced and separated nearly to their ends. Accordingly, the magnetic flux generated with the twister coil is adjusted going in the left to right direction then reversed in polarity and readjusted while returning from right to left. It is this controlled twister flux that combines with the linear vertical deflection flux to straighten and then step each scan line to produce an aligned raster.

Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.

Abstract: A transparent pad having a polishing surface with an average surface roughness of 5 ?m or less is used as a polishing pad. An indentation is formed on the back surface of the transparent pad such that its rate of light transmission is locally changed. The transparent pad has a rate of light transmission equal to or greater than 10% or preferably 30% for light of at least one wavelength in the range of 350 nm–900 nm.

Abstract: Methods and apparatus are described relating to a system-on-a-chip which includes a plurality of synchronous modules, each synchronous module having an associated clock domain characterized by a data rate, the data rates comprising a plurality of different data rates. The system-on-a-chip also includes a plurality of clock domain converters. Each clock domain converter is coupled to a corresponding one of the synchronous modules, and is operable to convert data between the clock domain of the corresponding synchronous module and an asynchronous domain characterized by transmission of data according to an asynchronous handshake protocol. An asynchronous crossbar is coupled to the plurality of clock domain converters, and is operable in the asynchronous domain to implement a first-in-first-out (FIFO) channel between any two of the clock domain converters, thereby facilitating communication between any two of the synchronous modules.

Abstract: Techniques for generation of Java macro instructions suitable for use in Java computing environments are disclosed. As such, the techniques can be implemented in a Java virtual machine to efficiently execute Java instructions. As will be appreciated, a Java macro instruction can be substituted for two or more Java Bytecode instructions. This, in turn, reduces the number of Java instructions that are executed by the interpreter. As a result, the performance of virtual machines, especially those operating with limited resources, is improved. A Java macro instruction can be generated for conventional Java instruction sequences or sequences of Java instruction that are provided in a reduced set of instruction. In any case, sequences that are frequently encountered can be replaced by a Java macro instruction. These sequences are typically encountered when Java objects are instantiated, during programming loops, and when a local variables are assigned a value.

Abstract: Electronic systems are described including semiconductor circuitry characterized by first signals and all-metal circuitry characterized by second signals and comprising a plurality of transpinnors. Each transpinnor includes a network of thin-film elements. At least one thin-film element in each transpinnor exhibits giant magnetoresistance. Each transpinnor includes a conductor inductively coupled to the at least one thin-film element for controlling operation of the transpinnor. Interface circuitry connects the semiconductor circuitry to the all-metal circuitry and converts between the first signals and the second signals.

Abstract: Methods of preparing a porous low-k dielectric material on a substrate are provided. The methods involve the use of ultraviolet radiation to react with and remove porogen from a porogen containing precursor film, leaving a porous low-k dielectric matrix. Methods using oxidative conditions and non-oxidative conditions are described. The methods described may be used to remove porogen from porogen-containing precursor films. The porogen may be a hydrocarbon such as a terpene (e.g., alpha-terpinene) or a norbornene (e.g., ENB). The resulting porous low-k dielectric matrix can then be annealed to remove water and remaining silanols capped to protect it from degradation by ambient conditions, which methods will also be described.

Abstract: A contact ring for use in electroplating of a substrate material is constructed such that fluid (e.g., electrolyte) is allowed to flow radially away from the axis of a toroidal support ring, thus preventing the trapping of fluids between the substrate and the toroidal support ring. The contact ring is constructed with a series of openings arranged about the circumference of the ring and wherein an electrical contact is placed in the path of each opening so any fluid passing through the opening also passes around the associated electrical contact. Further, the electrical contacts are also placed such that a substrate (e.g., a semiconductor wafer) can be placed inside the support ring so as to electrically contact the electrical contacts. The toroidal support ring has an aerodynamically streamlined cross-section at the openings, such that fluid flows through the openings with reduced aerodynamic drag.

Abstract: A device for measuring thickness of an object has a vibration generator for generating vibrations in the object, a vibration detector for detecting vibrations generated in the object by the vibration generator and a frequency analyzer for calculating resonance frequency of the object. The vibration generator includes a light-emitting part which emits light towards the object to irradiate and to be absorbed by the object. A plurality of vibration detectors may be used and the frequency analyzer may include a sound speed analyzer for calculating speed of sound inside the object from vibrations detected by these plurality of vibration detectors.

Abstract: Methods and apparatus are provided for handling events such as faults and resets. Specialized circuitry or hardware is provided within a processor to invalidate the cache line associated with the processor cache reset address. Based on the invalided state of the cache reset address line, the processor obtains new instructions from data memory. The new instructions can be configured to invalidate the remaining cache lines using software mechanisms.