Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.

Abstract: A flat leadless package includes at least one die mounted onto a leadframe and electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, an assembly includes stacked leadless packages electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, a package module includes an assembly of stacked leadless packages mounted on a support and electrically connected to circuitry in the support using an electrically conductive polymer or an electrically conductive ink.

Abstract: A semiconductor multi-package module has an inverted second package stacked over a first package, in which the stacked packages are electronically interconnected by wire bonds, and in which at least one of the packages is provided with an electrical shield. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die and having a shield, affixing an upper molded package including an upper substrate in inverted orientation onto an upper surface of the lower package, and forming z-interconnects between the upper and lower substrates. Where the shield is situated above the lower package substrate, the inverted upper package is affixed onto an upper surface of the shield.

Abstract: A method for connecting a chip to a leadframe includes forming bumps on a die by a Au stud-bumping technique, and attaching the chip to the leadframe by thermo-compression of the bumps onto bonding fingers of the leadframe. Also a flip chip-in-leadframe package is made according to the method. The package provides improved electrical performance particularly for devices used in RF applications.

Abstract: A flip chip interconnection structure is formed by mechanically interlocking joining surfaces of a first and second element. The first element, which may be a bump on an integrated circuit chip, includes a soft, deformable material with a low yield strength and high elongation to failure. The surface of the second element, which may for example be a substrate pad, is provided with asperities into which the first element deforms plastically under pressure to form the mechanical interlock.

Abstract: A method for encapsulating flip chip interconnects includes applying a limited quantity of encapsulating resin to the interconnect side of an integrated circuit chip, and thereafter bringing the chip together with a substrate under conditions that promote the bonding of bumps on the interconnect side of the chip with bonding pads on the substrate. In some embodiments, the step of applying resin to the chip includes dipping the interconnect side of the chip to a predetermined depth in a pool of resin, and then withdrawing the chip from the resin pool. In some embodiments the step of applying resin to the chip includes providing a reservoir having a bottom, providing a pool of resin in the reservoir to a shallow depth over the reservoir bottom, dipping the chip into the resin pool so that the bumps contact the reservoir bottom, and then withdrawing the chip from the resin pool.

Abstract: A flip chip package is formed by a solid-state bond technique for connecting the input/output pads on the integrated circuit chip and the package substrate. The solid-state bond technique involves a direct mating of metal surfaces, and does not employ any particulate conductive material nor any melting or flow of any interconnecting material. Accordingly the connections can be formed at very fine geometries. In another aspect, the space between the surface of the integrated circuit chip and the subjacent surface of the package substrate is filled with a patterned adhesive structure, which consists of one or more adhesive materials that are deployed in a specified pattern in relation to the positions of the second level interconnections between the package and the printed circuit board.

Abstract: A lead frame for a surface mount semiconductor chip package includes a die attach paddle and leads, the die attach paddle having down bond attachment sites on an upper surface of the paddle near a peripheral margin of the paddle, and having a central die attach region on an upper surface of the paddle, wherein a portion of the upper surface of the paddle is recessed. In some embodiments the recessed portion of the upper surface of the paddle includes the die attach region, and in other embodiments the recessed portion of the upper surface of the paddle includes a groove. Also, a lead frame surface mount chip package including such a lead frame.

Abstract: A plastic ball grid array semiconductor package employs a metal heat spreader having supporting arms embedded in the molding cap, in which the embedded supporting arms are not directly affixed to the substrate or in which any supporting arm that is affixed to the substrate is affixed using a resilient material such as an elastomeric adhesive. Also, a process for forming the package includes steps of placing the heat spreader in a mold cavity, placing the substrate over the mold cavity such that the die support surface of the substrate contacts the supporting arms of the heat spreader, and injecting the molding material into the cavity to form the molding cap. The substrate is positioned in register over the mold cavity such that as the molding material hardens to form the mold cap the embedded heat spreader becomes fixed in the appropriate position in relation to the substrate.

Abstract: A package structure includes a heat spreader, a ground plane affixed to the heat spreader, and a flex tape interconnect substrate affixed to the ground plane. An aperture in the ground plane reveals a die attach surface on the heat spreader, and an aperture in the flex tape interconnect structure is aligned with the ground plane aperture such that the aligned apertures together with the revealed ground plane surface define a die cavity. The aperture in the ground plane is formed so as to form aperture walls substantially perpendicular to the ground plane. According to the invention the heat spreader, the ground plane, and the flex tape interconnect substrate have specified characteristics. Particularly, the heat spreader is provided as a metal sheet or strip, usually copper, having a “velvet type” oxide, usually a velvet black copper oxide, on at least the surface of the heat spreader to which the ground plane is to be affixed.

Abstract: A metal-dendrimer complex in which the metal active site is deep within the three-dimensional dendrimer construct, has superoxide dismutase-like activity. In particular embodiments the complex is a copper(II)-dendrimer complex and the dendrimer construct is a dendritic polypeptide, and the copper(II) is complexed with imidazole groups provided by histidine side groups within the dendritic construct. The dendrimer construct has a generally globular shape, and the branched chains nearer the surface are sufficiently densely packed to restrict the movement of larger biomolecules into the dendritic construct toward the metal active sites. Smaller molecules such as the superoxide anion (O2·−) move freely from the milieu into the dendritic complex and to the metal active sites, where the dismutation of superoxide to hydrogen peroxide is effected; and smaller molecules such as hydrogen peroxide move freely out from the dendritic complex to the milieu.

Abstract: A signal amplification method for detecting a target nucleic acid analyte having a homopolymeric region and a target sequence includes steps of: contacting an analyte under hybridizing conditions with a multiplicity of reporter probes, each reporter probe including a signal region and an oligonucleotide sequence which is complementary to and capable of forming a stable hybrid with the analyte homopolymeric region to form an analyte:reporter probe hybrid; and forming an analyte:capture probe hybrid by contacting the analyte target sequence with a capture probe under hybridizing conditions. The analyte:reporter probe hybrid may formed prior to contacting the analyte target sequence with the capture probe, so the result of contacting the analyte target sequence with the capture probe results in formation of an analyte:reporter probe:capture probe complex. The analyte:capture probe hybrid may be immobilized on a solid generally planar surface in an array format.