Abstract: A method for planarizing metal interconnects of a semiconductor wafer includes the steps of polishing the semiconductor wafer with a polishing solution and a polishing pad to planarize the metal interconnects. The polishing solution has by weight percent, 0.15 to 5 benzotriazole, 0 to 1 abrasive, 0 to 10 polymeric particles, 0 to 5 polymer-coated particles and balance water at a pH of less than 5 and a removal rate-pressure sensitivity (dr/dp) of at least 750 (?/min/psi). The polishing simultaneously accelerates removal of projecting metal from the metal interconnects with the polishing pad providing a first pressure that increases removal rate of the projecting metal; and it inhibits removal of recessed metal from the metal interconnects with the polishing pad providing a second pressure that decreases removal of the recessed metal.
Type:
Grant
Filed:
March 28, 2003
Date of Patent:
August 30, 2005
Assignee:
Rohn and Haas Electronic Materials CMP Holdings, Inc.
Inventors:
Jinru Bian, Tirthankar Ghosh, Terence M. Thomas