Abstract: A method, apparatus and system are disclosed for decoding an instruction in a variable-length instruction set. The instruction is one of a set of new types of instructions that uses a new escape code value, which is two bytes in length, to indicate that a third opcode byte includes the instruction-specific opcode for a new instruction. The new instructions are defined such the length of each instruction in the opcode map for one of the new escape opcode values may be determined using the same set of inputs, where each of the inputs is relevant to determining the length of each instruction in the new opcode map. For at least one embodiment, the length of one of the new instructions is determined without evaluating the instruction-specific opcode.

Abstract: An internal voltage generation circuit of a semiconductor device includes: a comparator for comparing a reference voltage level with a detection voltage level to provide a comparison signal; an internal voltage output device for raising a voltage of an internal voltage output terminal to a predetermined level in response to the comparison signal; and an internal voltage output controller for controlling the internal voltage output terminal to be raised to a selected level. A voltage applied to the internal voltage output terminal is outputted as an internal voltage.

Abstract: A method and an apparatus are described for providing biasing for an amplifier. In an embodiment invention, a bias network comprises an integration circuit to sense a voltage change for an amplifier. The bias network adjusts a bias voltage for the amplifier in response to the voltage change.

Abstract: A method of forming a semiconductor device is described comprising forming a first patterned conductive layer on a dielectric on a substrate. A first barrier layer comprising silicon nitride is formed on the surface of the first patterned conductive layer, followed by forming a second barrier layer comprising silicon carbide on the surface of the first barrier layer. Using standard lithographic techniques a via and a trench are formed to the surface of the conductive layer.

Abstract: The present invention is a method and apparatus for providing slew rate control. The apparatus comprises a first circuit and a second circuit having an output terminal that is coupled to a first end of the first circuit. The second circuit receives a first input signal and a second input signal. The apparatus further comprises a third circuit having an output terminal that is coupled to the first end of the first circuit. The third circuit also receives the first input signal and the second input signal. The first circuit generates an output signal having a predetermined slew rate, where the output signal has a first state when the first and second input signals are in a first state.