Patents Represented by Attorney, Agent or Law Firm Blakeky, Sokoloff, Taylor & Zafman LLP
  • Patent number: 7917734
    Abstract: A method, apparatus and system are disclosed for decoding an instruction in a variable-length instruction set. The instruction is one of a set of new types of instructions that uses a new escape code value, which is two bytes in length, to indicate that a third opcode byte includes the instruction-specific opcode for a new instruction. The new instructions are defined such the length of each instruction in the opcode map for one of the new escape opcode values may be determined using the same set of inputs, where each of the inputs is relevant to determining the length of each instruction in the new opcode map. For at least one embodiment, the length of one of the new instructions is determined without evaluating the instruction-specific opcode.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: March 29, 2011
    Assignee: Intel Corporation
    Inventors: James S. Coke, Peter J. Ruscito, Masood Tahir, David B. Jackson, Ves A. Naydenov, Scott D. Rodgers, Bret L. Toll, Frank Binns
  • Patent number: 6819185
    Abstract: A method and an apparatus are described for providing biasing for an amplifier. In an embodiment invention, a bias network comprises an integration circuit to sense a voltage change for an amplifier. The bias network adjusts a bias voltage for the amplifier in response to the voltage change.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: November 16, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventor: Brent R. Jensen
  • Patent number: 6800548
    Abstract: A method of forming a semiconductor device is described comprising forming a first patterned conductive layer on a dielectric on a substrate. A first barrier layer comprising silicon nitride is formed on the surface of the first patterned conductive layer, followed by forming a second barrier layer comprising silicon carbide on the surface of the first barrier layer. Using standard lithographic techniques a via and a trench are formed to the surface of the conductive layer.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: October 5, 2004
    Assignee: Intel Corporation
    Inventor: Ebrahim Andideh
  • Patent number: 5977790
    Abstract: The present invention is a method and apparatus for providing slew rate control. The apparatus comprises a first circuit and a second circuit having an output terminal that is coupled to a first end of the first circuit. The second circuit receives a first input signal and a second input signal. The apparatus further comprises a third circuit having an output terminal that is coupled to the first end of the first circuit. The third circuit also receives the first input signal and the second input signal. The first circuit generates an output signal having a predetermined slew rate, where the output signal has a first state when the first and second input signals are in a first state.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: November 2, 1999
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Ikuo Jimmy Sanwo, Mahyar Nejat, Hiroshi Takano