Patents Represented by Attorney Blakely, Sokloff, Taylor & Zafman LLP
  • Patent number: 7549122
    Abstract: A method for labeling the pixels within a selected visual area of at least one image frame containing that visual area from a sequence of image frames stored in memory and operative to be displayed on an interactive display so that a user may subsequently select the selected visual area on a pixel accurate, frame accurate basis. To label the selected visual area within an image frame, the scene within that image frame is segmented to identify the selected visual area, each pixel within that selected visual area is then labeled with an area identifier which is unique to that selected visual area, and the pixels containing the area identifiers are mapped into an item buffer. The item buffer is then compressed and stored within a labeled portion of memory linked with the stored frame image from which the item buffer was derived.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: June 16, 2009
    Assignee: Apple Inc.
    Inventors: Gavin Stuart Peter Miller, Eric Michael Hoffert
  • Patent number: 6977220
    Abstract: Formation of copper alloy interconnect lines on integrated circuits includes introducing dopant elements into a copper layer. Copper alloy interconnect lines may be formed by providing a doping layer over a copper layer, driving dopant material into the copper layer with a high temperature step, and polishing the copper layer to form individual lines. Copper alloy interconnect lines may be formed by implanting dopants into individual lines. Copper alloy interconnect lines may be formed by providing a doped seed layer with a capping layer to prevent premature oxidation, forming an overlying copper layer, driving in the dopants, and polishing to form individual lines.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: December 20, 2005
    Assignee: Intel Corporation
    Inventors: Thomas N. Marieb, Paul McGregor, Carolyn Block, Shu Jin
  • Patent number: 6864726
    Abstract: An apparatus and a method to control an output signal from a DAC-driven amplifier-based driver are disclosed. The apparatus includes an amplifier and a driver. The amplifier has a negative input terminal, a positive input terminal, and a first output terminal. The driver has an input terminal and a second output terminal, the input terminal coupled to the first output terminal of the amplifier and the second output terminal coupled to the positive input terminal of the amplifier to provide a positive feedback to the amplifier.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: March 8, 2005
    Assignee: Intel Corporation
    Inventors: Alexander Levin, Surya N. Koneru, John T. Maddux
  • Patent number: 6657990
    Abstract: A system is provided that establishes communication between a first system and a second system. A request is received to establish a connection between the first system and the second system. The system establishes a first connection between the first system and the second system. The first connection is capable of communicating visual data between the first system and the second system. The system also establishes a second connection between the first system and the second system. The second connection is capable of communicating audible data between the first system and the second system. The first system and the second system communicate using both the first connection and the second connection. The first connection can include a network communication link such as an Internet communication link. The second connection may include a telephone communication link capable of communicating telephony signals between the first system and the second system.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: December 2, 2003
    Assignee: Aspect Communications Corporation
    Inventors: Venkatachari Dilip, Janardhanan Jawahar
  • Patent number: 6230317
    Abstract: A method for executing software pipelined executable code generated by compiling a set of unexecutable instructions having an inner loop and an outer loop is disclosed. Instructions are executed that perform the operations specified in the outer loop using a first storage area. A second storage area is allocated for use when performing the operations specified in the inner loop. Instructions are then executed that perform the operations specified in the inner loop using the second storage area, wherein at least certain storage locations in the first storage area are not alterable while the operations specified in the inner loop are being performed.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: May 8, 2001
    Assignee: Intel Corporation
    Inventor: Youfeng Wu
  • Patent number: 6199083
    Abstract: According to one approach, the present invention is embodied in a computer system and a computer implemented method for interpolating a color value for a pixel that is represented by a pair binary coordinates in a texture map. Each binary coordinate has an integer and a fractional portion. First, the fractional portions of the binary coordinates are multiplied together to generate a first sigma value. A known color value for a first of the four nearest texels is multiplied by the first sigma value to determine the first texel's contribution to the weighted average of the four nearest texels. Next, each bit of the first sigma value is inverted to generate an inverted first sigma value. Then, the fractional portion of one of the binary coordinates is added to the inverted first sigma value to generate a second sigma value. A known color value for a second of the four nearest texels is multiplied by the second sigma value to determine the second texel's contribution to the weighted average.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: March 6, 2001
    Assignee: Intel Corporation
    Inventor: Sanzib Khaund
  • Patent number: 6026410
    Abstract: A natural language-based information organization and collaboration tool for a computer system is disclosed. The present invention includes an apparatus and method for processing text expressions in a computer system, the apparatus including: 1) an object database defining an information object with an associated keyword; 2) a user input device for receiving an input text expression; 3) a parsing device for identifying the keyword in the input text expression, the parsing device including functions for linking the input text expression to the information object based on the keyword identified in the input text expression; and 4) a user output device for displaying to the user the identity of the information object to which the input text expression was linked.
    Type: Grant
    Filed: February 10, 1997
    Date of Patent: February 15, 2000
    Assignee: Actioneer, Inc.
    Inventors: David Allen, Brian Smiga, Danny Rabbani, Dennis Buchheim, Tony Mann, Thomas Hagan, James Joaquin
  • Patent number: 6002272
    Abstract: A domino logic circuit includes a clocked precharge stage coupled to a positive voltage rail with the precharge stage having an input. An evaluation network adapted to receive at least one input is coupled between the precharge stage and a common voltage rail. A static CMOS stage is coupled to the positive voltage rail, and includes an input and an output, the input being coupled to a junction formed by the precharge stage and the evaluation network. A negative voltage rail is coupled to the static CMOS stage to precharge the output negative.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: December 14, 1999
    Assignee: Intel Corporation
    Inventors: Dinesh Somasekhar, Vivek De
  • Patent number: 5991161
    Abstract: A land grid array (LGA) carrier includes an interposer having a first surface and a second surface opposite the first surface, with a plurality of locations on the first surface adapted to receive a plurality of semiconductor dice and passive components. The second surface has a plurality of conductive pads coupled thereto.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: November 23, 1999
    Assignee: Intel Corporation
    Inventors: William A. Samaras, Paul T. Phillips, Michael P. Brownell
  • Patent number: D573778
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: July 29, 2008
    Assignee: Strategic Distribution, LP
    Inventor: John Hawker