Patents Represented by Attorney, Agent or Law Firm Blakey, Sokoloff, Taylor & Zafman LLP
  • Patent number: 6094105
    Abstract: An oscillator having an adjustable output frequency comprises a resonator, an inverting amplifier coupled to the resonator, a variable capacitance coupled to the resonator and to the amplifier, and a shift register coupled to the variable capacitance. The variable capacitance comprises a first bank of switchable capacitors coupled to an input of the oscillator and a second bank of switchable capacitors coupled to an output of the oscillator. The shift register includes a plurality of bits and is configured such that the logic state of each bit determines the switching state of a corresponding capacitor from each bank of switchable capacitors. By shifting the bits in the shift register, the variable capacitance is varied, causing an adjustment in the output frequency of the oscillator.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: July 25, 2000
    Assignee: Intel Corporation
    Inventor: Thomas A. Williamson
  • Patent number: 6085012
    Abstract: The invention relates to a waveguide and a method of forming a waveguide. The waveguide includes a corrugated polymer sheet having a top layer, a middle layer, and a bottom layer. Each of the top layer, the middle layer, and the bottom layer are defined by an index of refraction.
    Type: Grant
    Filed: May 11, 1999
    Date of Patent: July 4, 2000
    Assignee: Intel Corporation
    Inventor: Dennis M. O'Connor
  • Patent number: 6049124
    Abstract: A semiconductor package which includes a package substrate and a semiconductor chip located on the package substrate have coefficients of thermal expansion which differs by a large margin. The semiconductor chip has beveled edges and an epoxy is provided which reduce stresses on the semiconductor chip when the package is being heated.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: April 11, 2000
    Assignee: Intel Corporation
    Inventors: George F. Raiser, Gregory Turturro
  • Patent number: 6034677
    Abstract: A method and apparatus for displaying programming information by translating the display of a broadcast of a program are provided. Programming information is displayed along with the program broadcast on the screen such that no portion of the broadcast is covered by the programming information. A multiple channel broadcasting system is tuned to a channel to provide a display of a broadcast of a program on a screen. Programming information is displayed that identifies channels in the broadcasting system. When displaying the programming information, the display of the program broadcast is translated to a smaller broadcast window on the screen by superimposing at least one of a series of successively smaller broadcast window outlines over the display of the broadcast on the screen.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: March 7, 2000
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Fujio Noguchi, Kazuto Mugura, Takaaki Ota
  • Patent number: 6009497
    Abstract: A method for updating the content of EEPROM memory used for controlling processes run on a microprocessor used to control the operations of a long term memory array which includes moving an update process stored in the EEPROM memory to a random access memory associated with the microprocessor; and then using the update process stored in random access memory for erasing the contents of the EEPROM memory, and furnishing data to the microprocessor on a sector by sector basis from a host computer through an interface used by the microprocessor to provide data to the long term memory array. The data furnished by the host is written sector by sector to the EEPROM memory until the EEPROM memory has been updated.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: December 28, 1999
    Assignee: Intel Corporation
    Inventors: Steven E. Wells, Virgil Niles Kynett, Terry L. Kendall, Richard Garner, Dave M. Brown
  • Patent number: 6002443
    Abstract: The method and apparatus identifies selected broadcast segments, such as commercial advertisements, of a television signal in real-time for the purpose of muting the video and audio portions of the television signal during each unwanted segment. A signature pattern associated with each segment of the television signal is detected and compared to stored signature patterns representative of selected segments such as commercial advertisement segments. If the signature pattern matches one of the stored signature patterns, the segment is thereby immediately identified as being one of the selected segments and is processed in real-time to mute the audio and video portions of the television signal during the segment. If the signature pattern of the segment does not match any of the stored signature patterns, the segment is analyzed to determine whether the segment is nevertheless a selected segment and, if so, its signature pattern is stored along with the stored signature patterns.
    Type: Grant
    Filed: November 1, 1996
    Date of Patent: December 14, 1999
    Inventor: Jerry Iggulden
  • Patent number: 5880622
    Abstract: A method and apparatus for controlling a charge pump. A detection circuit is used to assert a detect signal when a power supply voltage exceeds a first threshold voltage and deassert the detect signal in response to a trigger. The detect signal is used to force a charge pump to operate in a mode that drives the capacitive node at its output to the target voltage with reduced latency. This is particularly useful for a device which may operate the charge pump in a reduced power mode which is designed to maintain the node voltage at reduced power rather than drive it to the degree necessary for reduced latency during power up.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: March 9, 1999
    Assignee: Intel Corporation
    Inventors: Jeff Evertt, Jahanshir J. Javanifard, Mase Taub
  • Patent number: 5848066
    Abstract: Methods for designing a programmable interconnect matrix having reduced connectivity to achieve maximum routability for the reduced connectivity. An array of multiplexors, each having a multiplexor width w.sub.mux that is less than number of input conductors for the programmable matrix, are coupled to the input conductors of the programmable interconnect matrix such that the number of input signals shared between any two multiplexors is less than the multiplexor width w.sub.mux and such that each input signal has approximately the same number of chances to route. To better ensure the successful routing of input signals by a programmable interconnect matrix designed according to the present methods, improved routing methods are also described. According to a first embodiment, routing is accomplished by swapping successfully routed input signals with a blocked input signal and determining whether the input signal that has been swapped out may be routed through available multiplexors.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: December 8, 1998
    Assignee: Cypress Semiconductor Corp.
    Inventors: Hagop A. Nazarian, Stephen M. Douglass, W. Alfred Graf, S. Babar Raza, Sundar Rajan, Shiva Sorooshian Borzin, Darren Neuman
  • Patent number: 5825775
    Abstract: A method and apparatus for generating a display containing information about both the local and remote traffic handled by an integrated router/hub is provided. An integrated router/hub routes local messages between devices on a first local area network, and routes remote messages between the first local area network and a second local area network. The integrated router/hub stores a first set of values related to the local messages, and a second set of values related to the remote messages. A network management station executes a network management application the includes instructions which cause the network management station to generate a display of the information stored in the integrated router/hub. In response to user input, the network management station requests the information from the integrated router/hub, receives the information from the integrated router/hub, and generates the display of the information. The display may include charts that illustrate statistics derived from the information.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: October 20, 1998
    Assignee: Bay Networks, Inc.
    Inventors: Jeffrey A. Chin, Leon Y.K. Leong, Frank S. Lee
  • Patent number: 5786710
    Abstract: A programmable I/O cell with a multiplicity of configurations and data conversion options implemented through the use of antifuses. Increased logic utilization and reduced number of components necessary to implement such designs by using the registers in the I/O cell to implement data conversion functions thereby saving the logic and registers of the FPGA logic cells for implementation of other functions is achieved. Serial-to-parallel and parallel-to-serial data conversion operations utilize adjacent registers in adjacent cells to perform shift operations.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: July 28, 1998
    Assignee: Cypress Semiconductor Corp.
    Inventor: W. Alfred Graf