Abstract: A method for creating electrical interconnects between a semiconductor die and package. In the preferred embodiment, an insulating material is applied over the die and extends to the substrate contact pads, leaving a portion of each contact pad exposed. Holes are then trimmed through the insulating material, exposing at least a portion of each die bond pad. A conductive material is then applied over the die, flowing into the holes, contacting the die bond pads, and extending out to contact at least a portion of each substrate contact pad. In another preferred embodiment, an electrically conductive bump may be formed on each die bond pad, protruding through said non-conductive material and at least partially through said conductive material. The conductive layer is then laser trimmed, forming conductive patches that serve as electrical interconnects between the die and package substrate.

Abstract: An adjustable impedance boosting circuit for a magneto-resistive head in a gain stage beyond the input gain stage. The boosting circuit compensates for a frequency pole of the head leads by introducing a zero in proportion to the resistance of the magneto-resistive element and with selectable circuit parameters to further adjust the pole compensation. The invention includes selectively adjusting the sensitivity of the pole compensation to changes in the resistance of the head, selectively adjusting the peak compensation, and adjusting the frequency of the compensating zero.

Abstract: An image information encoding system that includes detecting an image portion for which higher image quality is desired based on the motion vector value and the image error value, calculating a bit rate control value based on the detection result as well as the buffer usage rate, and changing the roughness of the quantization step based on the bit rate control value. The objective is to minimize the degradation of an image due to compression of a still image portion.

Abstract: To provide a type of Reed-Solomon coding device that allows a reduction of the size and price of the device. When the coding of the Galois field GFb(2m) is performed, in the input-side transformation circuit 116b, the Galois field of the input data is transformed from GFb(2m) into GFa(2m). In RS coding/decoding core unit 112, an operation is then performed on Galois field GFa(2m) to generate the coding data. In output-side transformation circuit 119b, the coding data are transformed from GFa(2m) into GFb(2m). In RS coding/decoding core unit 112, a multiplier corresponding to Galois field GFa(2m) is set.

Abstract: An oscilator circuit for a integrated circuit memory device to optimize the refresh operating circuit and suppress wasteful power consumption in which the oscillator frequency is set high during high temperatures and the oscillator frequency is set low during low temperatures. A current I1 is generated by means of the current source 100a having characteristics in which it is increased during high temperatures and decreased during low temperatures, and is supplied to the ring oscillator 200.

Abstract: An improved auto-zeroing circuit for reducing offset currents from high impedance CMOS current drivers. The Auto zero circuit of the present invention contains means to disconnect the output of the current driver from its low impedance load, means to substantially simultaneously connect a capacitor to the output of the current driver, and means to use the output voltage of the current sources during the zeroing mode to adjust the voltage on the capacitor. The capacitor voltage is then used to adjust either of the two output current sources to reduce the offset currents.

Abstract: The objective of this invention is to prevent the defects of a semiconductor chip occurring when the passivation film or oxide film is damaged by reducing the stress applied to the main plane of the semiconductor chip during the curing stage of a potting resin in an overlap type TCP semiconductor device. In overlap type TCP semiconductor device 10, an elastic film 7 is formed on insulating film 2 on the side that faces the main plane of semiconductor chip 1. The filler made of silica oxide and contained in the supplied potting resin 6 flows into the space S between semiconductor chip 1 and insulating film 2 formed by support bumps 5. As potting resin 6 cures, the volume of the resin is reduced, and the space S is also reduced. The filler with a relatively large size is sandwiched between the main plane of semiconductor chip 1 and insulating film 2 to apply stress to the chip's main plane.

Abstract: Generally, the present invention is an optically controlled optical waveguide circuit comprising a substrate 30, an inorganic waveguide core 34 disposed within one or more cladding layers 36 upon the substrate 30 and an active cladding drop-in component 40 comprising a non-linear optical material adjacent to the waveguide core wherein the phase of an optical signal within the waveguide core may be modulated by controlling the index of refraction of the active cladding region. An embodiment of the present invention uses an inorganic optical waveguide 34 with a drop-in component of non-linear silica 40 as an active cladding to provide a phase modulator for a Mach-Zender interferometer which can be used to implement high speed low loss switching of optical signals.