Patents Represented by Attorney Brett Dorny
  • Patent number: 5497345
    Abstract: To protect the thin tunnel oxide layer interposed between the floating gate region of memory cells and the substrate and which are subject to in-process damage, when the wafer is subjected to radiation, provision is made for a diode, connected between the control gate region of the cells and the substrate. The diode defines a conductive path that, when normal operating voltage is applied to the control gate regions, is turned off and has no effect on normal operation of the memory, and which is turned on to permit the passage of charges between the control gate region and the substrate, when the control gate potential exceeds normal operating potential but is less than the breakdown voltage of the tunnel oxide divided by the coupling factor of the control and floating gate regions of the cells. The diode is appropriately formed prior to patterning the control gate regions of the cells.
    Type: Grant
    Filed: February 15, 1994
    Date of Patent: March 5, 1996
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventor: Paolo G. Cappelletti