Abstract: A time delay filter includes at least one field-effect transistor of the MOS type and at least one bipolar transistor having their respective base and gate terminals connected together. The bipolar transistor is coupled to an input terminal through a drive transistor, and the field-effect transistor is coupled to an output terminal. The charge time for the gate capacitance of the field-effect transistor, using the low base current of the bipolar transistor, enables high-frequency noise to be filtered out of input digital signals.

Abstract: A processor architecture for executing a current task among a plurality of possible tasks. The architecture includes: a plurality of instruction pointers respectively associated with the tasks and each storing the address of the current instruction to be executed of the associated task, only one of these pointers being enabled at a time to supply an address to the memory; a priority level decoder including circuitry for assigning a predetermined priority level to each request signal and for enabling the instruction pointer associated with the active request signal having the highest priority level; and a mechanism for incrementing the content of the enabled instruction pointer and for reinitializing it at the start address of the associated program when its content reaches the end address of the associated program.