Abstract: An actuator fixing apparatus for a disk drive of a computer is disclosed. In a disk drive system having a disk capable of being rotated at a high speed by a spindle motor, a pivotally installed actuator, head gimbals installed on one end of the actuator connecting the actuator to a magnetic head, a voice coil motor and a bobbin positioned on a bottom portion of the actuator, an actuator fixing apparatus includes an automatic locking arm extending from an end portion of the actuator. The automatic locking arm has a locking groove formed on a bottom portion thereof. The apparatus also includes a stopper having first and second locking magnets and a hook-shaped locking unit rotatably installed adjacent to the stopper having first and second metal conducting plates. The hook-shaped locking unit has a locking projection extending from it, whereby the locking projection is inserted into the locking groove to prevent movement of the actuator.

Abstract: A semiconductor memory device having normal columns and redundant columns includes normal column decoders for designating the normal columns and redundant column decoders for designating the redundant columns so that the bits from the normal columns are combined with the bits from the redundant columns so as to provide an entire byte. The normal column decoders are to be operated simultaneously with the redundant column decoders.

Abstract: An address control system for a RAM, comprising a synchronous counter for receiving input data according to a clock signal and providing n-bit row column address, and an n-bit column address a first buffer for receiving the n-bit row address from the synchronous counter and generating the n-bit row address, a first tri-state inverter for outputting data stored in a ROM according to a write enable signal a second tri-state inverter for outputting reference data according to the write enable signal, an adder for adding the n-bit column address from the synchronous counter and output address signals from the first inverter, and a second buffer for receiving output signals from the adder generating a column address delayed from the n-bit column address.

Abstract: A method for interactively diagnosing and controlling a state of a remote facsimile device which communicates with a center facsimile device of an after-service center by using non-standard format by writing or reading data into or from memory includes the steps of: requesting entry of a telephone number of the remote facsimile device after determining a remote control mode exists when a function key is pressed; checking whether a memory reading or writing mode is selected and determining whether a remote diagnosis process, a name registration process, a telephone number registration process and an option reading process are selected. When the above processes are selected respectively, each process is performed and results are printed. If, however, the option reading process was not selected, the method proceeds to a memory reading process for repeatedly performing the foregoing steps.

Abstract: Radio transmitting and receiving circuits are disclosed which operate wireless without interference and where the main body of a video camera is detached from the view finder. A timing controller applied to a radio transmitting circuit inserts an encoding signal into a video signal having a predetermined horizontal synchronizing signal interval. Meanwhile, a timing controller applied to a radio receiving circuit extracts the encoded video signal and supplies it to a decoder. The decoded signal is read in conjunction with a reference code signal in a code discriminator, and the received signal is displayed in the view finder only if the codes match.

Abstract: An electrically page erasable and programmable read only memory device is an EEPROM device which is erasable page by page, and consists of flash-type floating gate transistors as the memory cells. The memory cell array of the device is divided by a plurality of pages, wherein each page comprises a plurality of bit lines, a plurality of common source lines, and a plurality of word lines. A plurality of erase selection circuits are arranged and correspond to the respective pages in order to erase the cells in a selected page, wherein each erase selection circuit comprises a passing transistor, a gate, a voltage stabilizing transistor, and an erasing line.

Abstract: Disclosed is an address producing circuit for zoom function in which horizontal and vertical addresses are to make more free selection of a partial picture around a plurality of locations disposed on a screen of a monitor device, and image data stored in a predetermined address region according to the selection is read out to display on the screen, so that the picture of the selected partial region can be magnified to a whole screen picture.

Abstract: In a gas governor for installation with a burner in a gas-fired appliance, all incoming gas is introduced into a common burner gas channel through a peripheral channel of a valve stem. A common burner gas channel branches into two channels to form a main burner channel and a pilot burner gas channel. By means of a flange integrally mounted around the outlet portion of main burner gas channel, the centerline of the main burner nozzle which is formed in the outlet of the main burner gas channel, may be coaxially aligned with the central axis of the venturi tube of main burner.

Abstract: A cassette loading device for use in the tape recorder of which a door and a receiving holder is opened and closed by levers against a deck, wherein a slider of a cassette interposed between the receiving holder and the door is slidingly opened and closed by an opening and closing function of the door thereby enabling the height of the door and the receiving holder to be changeably positioned mutually with in opening and closing of the door and the receiving holder. The middle portion of the door is connected with the lower part of the deck by a third pair of lever members supported by a pair of pins; the door is connected with each lever member of the third pair of lever members supported by a pair of hinge members mounted on the lower ends of the receiving means.

Abstract: There is disclosed a screen encore method capable of re-playing the exact portion to be watched again by using a counter module.

Abstract: A noise reduction circuit for video contour emphasis signal including an amplification circuit for the contour signal, mean value detection circuit for the contour signal, a noise reduction level control circuit, positive and negative noise reduction circuit and output level control circuit, thereby eliminating the noise signal included in the contour signal and improving the signal to noise ratio.

Abstract: An anti-oxidation system of a wire bonder for bonding a wire between a chip pad and a lead frame for a semiconductor device, said wire being comprised of an oxidizable material such as copper or aluminum, wherein a reduction gas for preventing oxidation of the wire is periodically supplied around a spool wound by said wire, at least one gas tube for supplying the reduction gas is disposed towards both sides of a capillary device drawing out the wire, said gas tubes being disposed just beneath the end of capillary device in opposite directions to each other, and a torch being disposed facing with a lower surface of either one of said gas tubes and just beneath the capillary device.

Abstract: A method capable of displaying the message at one time by detecting a message of 12 digits when receiving the message over 15 digits in a paging receiver of a POCSAG code system. According to one aspect of the present invention, in a paging receiver system having a display for 12 digits and utilizing a POCSAG code transmitting 5 digits per message code word.

Abstract: An art processor in a picture-in-picture system which performs a given art processing to a subscreen when subscreen the same image source as a main screen. One embodiment to carry out the objects of the invention includes a first synchronous signal detector and a second synchronous signal detector which detect synchronous signals from image sources received, an exclusive OR gate for comparing a first synchronous signal and a second synchronous signal, an integrator for integrating said synchronous signals, a monostable multivibrator for producing a pulse signal having a given width, a DC generator for changing said pulse signal to a smooth DC signal, a driving signal generator for producing a driving signal by use of said DC signal, a switching stage for switching a plurality of input lines of PIP signal according to said driving signal, and a D/A converter for generating a given art signal for the subscreen.