Abstract: Ferroelectric memory using multiferroics is described. The multiferroic memory includes a substrate having a source region, a drain region and a channel region separating the source region and the drain region. An electrically insulating layer is adjacent to the source region, drain region and channel region. A data storage cell having a composite multiferroic layer is adjacent to the electrically insulating layer. The electrically insulating layer separated the data storage cell form the channel region. A control gate electrode is adjacent to the data storage cell. The data storage cell separates at least a portion of the control gate electrode from the electrically insulating layer.
Type:
Grant
Filed:
June 24, 2008
Date of Patent:
April 20, 2010
Assignee:
Seagate Technology LLC
Inventors:
Haiwen Xi, Wei Tian, Yang Li, Insik Jin, Song S. Xue