Patents Represented by Attorney, Agent or Law Firm Carrie Boone
  • Patent number: 7017258
    Abstract: A system for mounting heatsinks, in particular, high-mass heatsinks, on printed circuit boards, such as motherboards. The mounting system includes a backplate, disposed beneath the motherboard, with pins protruding up through the motherboard, and a linkage assembly, which is fixably attached to a base portion of a heatsink assembly. The linkage assembly includes scoops, for grasping the pins during engagement, and a ratcheting system, for compressing the heatsink and thermal interface material onto the package. The mounting system is designed to effectively distribute the heatsink weight, as well as the forces caused by chronic and dynamic stresses, through, rather than upon the motherboard, such as to a chassis. The mounting system thus alleviates stress cracks, component pullout, solderball stress, and other damaging conditions to the motherboard. The mounting system may be engaged and disengaged without the use of tools.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: March 28, 2006
    Assignee: Intel Corporation
    Inventors: Michael Z. Eckblad, Mark W. Anderson
  • Patent number: 6997560
    Abstract: An optical system including two or more micromirror arrays is disclosed. The micromirror arrays include alternately disposed transparent and opaque surfaces. The system spatially separates an image toward the micromirror arrays, the image is reflected from the micromirrors, and the reflected image is combined into a composite image that can be displayed or projected. Control and support circuitry that is typically disposed beneath the transparent surfaces of the micromirror arrays can be disposed beneath the opaque surfaces.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: February 14, 2006
    Assignee: Intel Corporation
    Inventor: Gary F. Shade
  • Patent number: 6940577
    Abstract: An LCOS display, including specially manufactured spacers, and a process for making the display, are disclosed. The spacers ensure a uniform cell gap along the entire display. The spacers occupy a region between pixels, such that they do not interfere with light modulation and are not visible during magnification. The spacers are manufactured using known deposition, lithography and etching techniques, and are made from widely available materials. The process results in a high yield of high-quality LCOS displays.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Michael Kozhukh
  • Patent number: 6936773
    Abstract: A system and method are disclosed in which separate impedance compensation circuitry is allocated for an interface according to the space occupied on a printed circuit board (PCB) by the interface. Where an interface occupies two or more layers of the PCB, an impedance compensation circuit is dedicated to each layer on behalf of the interface. By dedicating impedance compensation, not just to the interface alone, but to the physical space occupied by the interface, the system and method are able to exploit multiple-layer and same-layer trace impedances, save board space and/or provide AC timings recovery.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: August 30, 2005
    Assignee: Intel Corporation
    Inventor: Ronald Martin
  • Patent number: 6917409
    Abstract: An LCOS display, including specially manufactured spacers, and a process for making the display, are disclosed. The spacers ensure a uniform cell gap along the entire display. The spacers occupy a region between pixels, such that they do not interfere with light modulation and are not visible during magnification. The spacers are manufactured using known deposition, lithography and etching techniques, and are made from widely available materials. The process results in a high yield of high-quality LCOS displays.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: July 12, 2005
    Assignee: Intel Corporation
    Inventor: Michael Kozhukh
  • Patent number: 6902377
    Abstract: A fan impeller is part of a fan assembly designed to maximize both intake and expelled air during use. The fan impeller employs a distinct airfoil shape for the fan blades to substantially move the ambient air. A low constant blade angle and overlapping blades are employed to improve the blade lift and consequent mass flow and exit pressure. The blade stall is eliminated, as evidenced by a smoothened fan curve, for more efficient operation. The blade sweep angle is optimally arranged to control radial flow characteristics of the ambient air. Housing sidewalls are removed from the fan assembly to remove parasitic drag and improve the motion of air passing through the fan.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: June 7, 2005
    Assignee: Intel Corporation
    Inventor: Michael T. Crocker
  • Patent number: 6885557
    Abstract: A system assembly for the retention of heatsinks, in particular, high-mass heatsinks, is disclosed. The system assembly includes a backplate with standoffs extending transverse to a system board, for securing a heatsink to the system board. The standoffs effectively distribute the mass of the heatsink away from the system board, the processor, and socket, minimizing damage to these components. A TIM spring disposed within the backplate provides upward pressure to the system assembly to uniformly spread a thermal interface material between the processor and the heatsink, thereby facilitating effective heat transfer.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: April 26, 2005
    Assignee: Intel Corporaiton
    Inventor: Edgar J. Unrein
  • Patent number: 6879489
    Abstract: A system in which a voltage regulator controls the die voltage rather than the socket voltage of a microprocessor is disclosed. The voltage regulator's response time is decreased due to the larger transient of the die voltage, relative to the socket voltage. The variation in socket resistance is no longer a factor affecting voltage and power loss margins. The system is implemented with minimal cost, as the die voltage is already available for use during testing.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: April 12, 2005
    Assignee: Intel Corporation
    Inventor: Henry W. Koertzen
  • Patent number: 6879138
    Abstract: A buck converter is disclosed which prevents a voltage drop below a desired voltage when a load change occurs. The buck converter generates an override signal to turn on one or more switch devices in the circuitry. The effect of the override signal is to provide a sudden increase in the current supplied to a load, preventing the output voltage from dropping below the predetermined level. Sensing circuitry within the buck converter detects a voltage drop at the load, causing the override signal to be generated. The override signal may be a continuous signal or a one-shot pulse. Additional current sensing circuitry and the switch history of the buck converter determines the duration of the override signal for one embodiment and the number of switches activated within the buck converter.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: April 12, 2005
    Assignee: Intel Corporation
    Inventors: James S. Dinh, Robert D. Wickersham
  • Patent number: 6854372
    Abstract: A miter saw is adapted for performing lengthwise, or rip, operations on a work piece such as wood. A back support arm is positioned off-center such that the work piece can be inserted under the miter saw substantially parallel to the blade. An arcuate aperture in the back support arm ensures that bevel adjustment properly aligns the blade with the blade slot during bevel cuts. An adjustable rail enables the work piece to be positioned in either a normal position, for crosswise cuts, or an orthogonal position, for lengthwise cuts. A toggle switch overrides the on/off switch on the handle, useful when the work piece is fed from behind. Two separate sleeves cover the blade, assuring safety during operation for both lengthwise and crosswise cuts. A tensioning board feed roller holds the work piece in place during lengthwise cutting.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: February 15, 2005
    Inventor: William Jefferson Anthony
  • Patent number: 6854693
    Abstract: A tie wrap assembly comprises a tie wrap, for retaining a cable assembly, and a tie wrap base, for connecting the cable assembly to the chassis. The tie wrap includes a shaped engagement member for fittably coupling to an orifice within the tie wrap base. The tie wrap base is flexible, allowing the engagement member to be repeatedly inserted into and removed from the tie wrap base, as well as being fit through a hole in the chassis. One or more tie wrap bases are disposed at pre-arranged locations along the chassis. The tie wrap assembly allows cabling to be consistently routed along the pre-arranged locations, facilitating the consistent placement of cables in a mass production environment.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: February 15, 2005
    Assignee: Intel Corporation
    Inventors: Joe A. Harrison, Anthony P. Valpiani
  • Patent number: 6795826
    Abstract: A system and a method for managing information encapsulates the information as objects. The objects are related by a degree to other objects in a content network. The relationships between the objects may be established and enhanced by various human or automatic means. An attractive user interface facilitates use and management of the network by many users. Access to the content network may be customized for distinct user groups.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: September 21, 2004
    Assignee: Manyworlds Consulting, Inc.
    Inventors: Steven D. Flinn, Naomi F. Moneypenny
  • Patent number: 6771099
    Abstract: A synchronizer eliminates metastability due to violation of either the setup time or the hold time of a circuit. The input of a first flip-flop (12a) is tied to a constant logic level (VDD or ground). The first flip-flop receives an asynchronous signal into the reset (preset or clear) input of the flip-flop. No violation of the setup or hold times of the flip-flop can occur. The second flip-flop (12c) receives the output of the first flip-flop as its clock input. The second flip-flop (12c) is configured as a toggler. The second flip-flop produces a synchronized partial signal (18a) of the original asynchronous signal (10a). Third and fourth flip-flops (12b,12d) may similarly be configured to produce a second synchronized partial signal (18b) of the asynchronous signal recovery and may prevent runt pulses from being received by the flip-flops.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: August 3, 2004
    Inventors: Jose Alberto Cavazos, Robert Maurise Simle
  • Patent number: 6747369
    Abstract: A power system is disclosed for receiving dual alternating current sources and delivering direct current to drive a load. The power system comprises four power supplies and two transfer switch modules, any of which may be removed and replaced without disabling the power system. Three of the power supplies deliver current to drive the load while the fourth is redundant. A transfer switch control circuit activates relays within the transfer switch modules, in response to a change in the voltage maintained by one or both AC sources. As long as one of the AC sources maintains a voltage within a predetermined voltage range, three of the power supplies deliver current to drive the load.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: June 8, 2004
    Assignee: Intel Corporation
    Inventors: Brian J. Griffith, Viktor D. Vogman
  • Patent number: 6710266
    Abstract: A technique to simultaneously reduce high-frequency insertion loss and cross-talk for a multi-layered add-in card is disclosed. The technique is based on selective removal of ground and power planes beneath the edge fingers. This selective removal of power and ground planes removes excess capacitance at the edge fingers, lowering the insertion loss at high frequencies, while maintaining an impedance match with an associated connector. Simultaneously, the leftover metallic ground/power plane provides electromagnetic shielding and thus reduces the cross-talk between the differential pairs. Optimum performance of the connector with minimized insertion loss and cross-talk can be obtained for high-speed analog and digital applications.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: March 23, 2004
    Assignee: Intel Corporation
    Inventors: Jason A. Mix, Yun Ling, Alok Tripathi, Kent E. Mallory
  • Patent number: 6625021
    Abstract: A heat sink provides efficient heat transfer from a heat-producing semiconductor device. Heat pipes project from a spreader plate in contact with the device and distribute heat to multiple cooling fins. The fins are arranged for maximum contact with the ambient air. An active fan is internally disposed within the fins, for further cooling efficiency. The heat sink may be permanently affixed to a printed circuit board holding the semiconductor device or the heat sink may be attached and released thereto without need of tools. A base plate maintains spring-like compliance of the printed circuit board while allowing sufficient clamping force on the heat sink to sustain thermal contact with the heat-producing surface during shock-loading.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: September 23, 2003
    Assignee: Intel Corporation
    Inventors: Steven J. Lofland, Jason B. Chesser
  • Patent number: 6412118
    Abstract: A pocket handkerchief is arranged to be displayed from a pocket, such as a breast pocket of a business suit. The pocket handkerchief is woven entirely of fabric and stitched such that an ornamental part of the handkerchief is visible when deposited in the pocket. The pocket handkerchief may be useful as a handkerchief, when needed. After use, the pocket handkerchief may be returned to the pocket and thereafter maintain its stylish quality.
    Type: Grant
    Filed: April 13, 2001
    Date of Patent: July 2, 2002
    Inventor: Garland R. Shanklin
  • Patent number: 6305387
    Abstract: A hair styling tool may secure hair in a variety of styles. The hair styling tool may be constructed from an elastomeric material so that it may be shaped for a variety of hair styles. The hair styling device grips the hair using two clamping surfaces, which may particularly hold fine hair in place. The hair styling tool may be secured using picks. The picks may be adorned with a variety of accessories.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: October 23, 2001
    Inventor: Becky K. Atchison
  • Patent number: D451760
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: December 11, 2001
    Inventor: Stephanie Donaldson Fox