Abstract: A method and system for power node current waveform modeling provides improved accuracy for logic gate and functional block power node current models in computer-based verification and design tools. An output voltage waveform is generated, with each point a linear function of a set of input values corresponding to times at which the output voltage reaches predetermined fractions of the supply voltage. A set of coefficients is used for each point, as each output voltage has a different linear dependency on the input values. The output voltage waveform model is differentiated and multiplied by an effective load capacitance to determine an output current waveform. The method and system retain compatibility with existing software by using input values already present in the digital simulation models (e.g., delay times) that yield a subset of output voltage points. The coefficients of the model are predetermined for a circuit from principle components analysis.

Abstract: An improved sense amplifier ad method for sensing signals in a silicon-on-insulator (SOI) integrated circuit improve the performance of semiconductor memories and other circuits implemented in SOI technology. The bodies of amplifier transistors within the sense amplifier and bodies of input transistors to the sense amplifier are coupled to corresponding input signals, eliminating the history dependance that would result from unconnected bodies, while achieving faster switching times due to a dynamically produced difference in threshold voltage of the input transistors and amplifier transistors. The switching time is improved over circuits using input transistors and amplifier transistors having statically biased bodies.