Patents Represented by Attorney, Agent or Law Firm Chambliss, Bahner & Stophel
  • Patent number: 7312402
    Abstract: A method and apparatus that provides improved loop inductance of decoupling capacitors. Vias are moved close to the pads and close to each other. Instead of placing power and ground vias on opposite sides of the capacitor, these vias are moved around to the same side of the capacitor and are placed as close to each other as manufacturing tolerances will allow. For designs using standard two-terminal surface mount capacitors, two vias per capacitor, and standard manufacturing procedures (no vias inside pads, for example), the lowest possible loop inductance of the capacitor's connections to the printed circuit board planes is provided. This results in the lowest effective capacitor series input inductance.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: December 25, 2007
    Assignee: International Business Machines Corporation
    Inventors: Rafael Antu, Cathy Marie Drews, David A. Plomgren, Todd Edward Takken
  • Patent number: 7271982
    Abstract: A method for forming a perpendicular magnetic recording head using an air-bearing surface damascene process and perpendicular magnetic recording head formed thereby is disclosed. The perpendicular head is formed by depositing a pseudo trailing shield layer over a pole layer and selectively etching the pseudo trailing shield layer to a depth equal to a desired trailing shield throat height. Then, a magnetic material is deposited in the resulting void.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: September 18, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Scott Arthur MacDonald, Ian Robson McFadyen, Neil Leslie Robertson
  • Patent number: 7230804
    Abstract: A magnetic tunnel transistor (MTT) is formed with a self-pinned emitter layer. The self-pinned emitter layer decreases resistance in by eliminating a thick resistive adjacent anti-ferromagnetic pinning layer. Also, the present invention reduces a series resistance in a base of the magnetic tunnel transistor by removing a pinned layer from the base.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: June 12, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Hardayal Singh Gill
  • Patent number: 7213893
    Abstract: A track cover adapted for use on an item of heavy construction equipment having at least one track. The track cover comprises an outside panel and a tread panel. The tread panel is preferably connected to the outside panel. The track cover also comprises an assembly for removably attaching the track cover to the item of heavy equipment. The track cover is adapted to cover at least a portion of the at least one track of the item of heavy construction equipment and retain dirt, rocks and other debris.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: May 8, 2007
    Inventor: Mark McCraw
  • Patent number: 7216347
    Abstract: A system, apparatus and method for dictating the order that print jobs received over multiple data channels are printed. A priority value is assigned to each data channel that receives print jobs. The priority value of the data channel is imparted to each of the print jobs received via its respective data channel. The relative priorities of the print jobs is determined, and the print jobs are printed in an order corresponding to their relative priority values.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: May 8, 2007
    Assignee: International Business Machines Corporation
    Inventors: Karen L. Harrison, Charles D. Johnson, Linda S. Liebelt
  • Patent number: 7203037
    Abstract: A method and apparatus for providing a dual current-perpendicular-to-plane (CPP) GMR sensor with improved top pinning is disclosed. In the passive regions of the sensor, a tri-level biasing layer is formed proximate to the top self-pinned layer. The tri-level biasing layer includes a first metal oxide layer, a layer of alpha-Fe2O3 and a second metal oxide layer. The pinning of the top self-pinned layer is enhanced by the layer of alpha-Fe2O3. The layer of alpha-Fe2O3 pins the top portion of the pinned layer by providing higher coercivity (HC) to the pinned layer.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: April 10, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventor: Hardayal Singh Gill
  • Patent number: 7199954
    Abstract: A method and apparatus for determining sector block sizes using existing controller signals has been disclosed. The invention detects a characteristic of a data channel gate signal indicating a length of data, determines the length of data based on the detection of the characteristic, and calculates the size of a last data block in the length of data based on the determined length.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: April 3, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Yuan Xing Lee, Weining Zeng
  • Patent number: 7091985
    Abstract: A method, apparatus, and information bearing medium for compressing color utilizes an expandable color palette for storing a pre-established number of n-bit color codes. Each of the n-bit color codes maps to an m-bit color value, where m is an integer greater than n. Up to the pre-established number of n-bit color codes are stored in a first palette table of the color palette. The color palette is expanded to include up to a specified number of palette tables for storing sets of the pre-established number of n-bit color codes. The pre-established number of n-bit color codes is characterized by 2n?1 color codes. The color palette is expanded to include up to (m/n)?1 palette tables for storing sets of 2n?1 color codes. Each of the palette tables is associated with a pixel table which stores a linking value for associating a particular palette table to a subsequently generated palette table.
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: August 15, 2006
    Assignee: International Business Machines Corporation
    Inventors: Timothy Leroy Towns, John T. Varga
  • Patent number: 7081041
    Abstract: A method for forming a write head top pole using chemical mechanical polishing with a diamond-like-carbon (DLC) polishing stop layer is disclosed. The method for providing a top pole of a write head includes forming a P2 pole tip, depositing a P2 filling layer to a P2 target thickness, wherein the P2 filling layer around the P2 pole tip is filled to a P2 target thickness while the P2 filling layer creates a topography above the P2 pole tip, depositing a DLC polishing stop layer over the P2 target thickness filling layer, and chemically mechanically polishing (CMP) any topography above the stop layer-covered P2 target thickness filling layer to the stop layer using a selective slurry.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: July 25, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Hung-Chin Guthrie, Ming Jiang
  • Patent number: 7075750
    Abstract: An apparatus for patterning a self-aligned coil using a damascene process is disclosed. Coil pockets are formed in a first insulation layer disposed over a first pole layer. A barrier/seed layer is deposited along walls of the coil pockets in the insulation layer. Copper is formed in the coil pockets and over the insulation layer. The copper is planarized down to the insulation layer. The self-aligned coil process packs more copper into the same coil pocket and relaxes the coil alignment tolerance. Protrusions are prevented because of the more efficient and uniform spacing of the coil to reduce heat buildup in the head during a write.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: July 11, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Daniel Wayne Bedell, Quang Le, Edward Hin Pong Lee, Son Van Nguyen, Vladimir Nikitin, Murali Ramasubramanian
  • Patent number: 7073022
    Abstract: The present invention describes a method and system for interfacing a plurality of device controllers to an array of data storage devices by serial connection. The device controllers are coupled to a serial interface by a bus and the devices of the storage array are coupled to the serial interface by a serial connection. The serial interface receives controller signals through the bus and multiplexes the signals onto the serial connections of the storage array. Arbitration between the various device controllers seeking access to the storage array is resolved through bus protocol and through drive based reserve/release registers in the serial interface processor.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: July 4, 2006
    Assignee: International Business Machines Corporation
    Inventors: Mohamad H. El-Batal, Yoshihiro Fujie, Thomas Sing-Klat Liong, Krishnakumar Rao Surugucchi
  • Patent number: 7070716
    Abstract: A method for providing transverse magnetic bias proximate to a pole tip to speed up the switching time of the pole-tip during the writing operation is disclosed. The transverse field disposed proximate the pole-tip helps the conventional driving field in rotating the magnetization through the first 90-degrees, especially at small angle where the effective anisotropy-field is strongest in opposing the conventional driving field. By offsetting the magnetization from its easy-axis, the transverse field also increases the torque that the collinear driving field would have on the magnetization.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: July 4, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Quan-Chiu Harry Lam
  • Patent number: 7073030
    Abstract: A method and apparatus for increasing the processing speed of processors and increasing the data hit ratio is disclosed herein. The method increases the processing speed by providing a non-L1 instruction caching that uses prefetch to increase the hit ratio. Cache lines in a cache set are buffered, wherein the cache lines have a parameter indicating data selection characteristics associated with each buffered cache line. Then which buffered cache lines to cast out and/or invalidate is determined based upon the parameter indicating data selection characteristics.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: July 4, 2006
    Assignee: International Business Machines Corporation
    Inventors: Michael Joseph Azevedo, Carol Spanel, Andrew Dale Walls
  • Patent number: 7072142
    Abstract: An apparatus for providing transverse magnetic bias proximate to a pole tip to speed up the switching time of the pole-tip during the writing operation is disclosed. The transverse field disposed proximate the pole-tip helps the conventional driving field in rotating the magnetization through the first 90-degrees, especially at small angle where the effective anisotropy-field is strongest in opposing the conventional driving field. By offsetting the magnetization from its easy-axis, the transverse field also increases the torque that the collinear driving field would have on the magnetization.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: July 4, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Quan-Chiu Harry Lam
  • Patent number: 7072154
    Abstract: A method and apparatus for enhancing thermal stability, improving biasing and reducing damage from electrical surges in self-pinned abutted junction heads. The head includes a free layer having a first end and a second end defining a width selected to form a desired trackwidth and an extended self-pinned bias layer extending beyond the ends of the free layer, the self-pinned bias layer extending beyond the free layer increasing the volume of the extended self-pinned bias layer to provide greater thermal stability and stronger pinning of the free layer.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: July 4, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Hardayal Singh Gill, Wen-Chien Hsiao, Jih-Shiuan Luo
  • Patent number: 6481382
    Abstract: An apparatus for controlling the movement of an animal using an integral collar and self-retracting leash apparatus. According to the invention, an elastomeric cord is attached to a strap, which is adapted to be secured around the neck of an animal. In the preferred embodiment of the invention, the strap encloses the fixed end of the elastomeric cord, which is attached to an anchor located near the first end of the strap. The cord extends from the anchor in a direction substantially parallel to the longitudinal axis of the strap and passes around about 180° of a pulley or spool located near the second end of the strap. The cord then extends from the pulley in a direction substantially parallel to the longitudinal axis of the strap to an opening located near the first end of the strap. The free end of the cord passes through the opening in the strap.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: November 19, 2002
    Inventor: Joan S. Cohn
  • Patent number: 6457630
    Abstract: An improved method for constructing a container having at least three panels, all of which intersect at a common point and each adjacent pair of which intersect along a line, includes welding each adjacent pair of panels to join them together by placing a weld along the intersecting line between such panels to a weld-terminating point spaced from the common intersecting point of the panels. A patch component its provided to cover the common intersecting point and each weld-terminating point, and to intersect with each panel along a line. The patch component is then welded to each of the panels by placing a weld along the line of intersection with each panel.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: October 1, 2002
    Assignee: The Heil Co.
    Inventor: Allan K. Nilsson
  • Patent number: D437014
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: January 30, 2001
    Assignee: Chattanooga Group, Inc.
    Inventors: Frederick W. Blanchard, James R. Vetter, Jr.