Patents Represented by Attorney Chapin & Huang, L.L.C.
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Patent number: 6695149Abstract: A technique for fastening a panel to an electronic cabinet frame involves inserting portions of rigid support members (e.g., rails) of the electronic cabinet frame into grooves defined by fasteners to attach the fasteners to the portions of the rigid support members of the electronic cabinet frame. The technique further involves positioning catches (e.g., latching members) of the panel adjacent catch members of the fasteners, and moving the panel toward the fasteners such that the catches of the panel engage with the catch members of the fasteners to fasten the panel to the electronic cabinet frame. Accordingly, no screws or other hardware is required to mount either the fasteners or the panel.Type: GrantFiled: August 9, 2002Date of Patent: February 24, 2004Assignee: EMC CorporationInventors: Gerald J. Cote, Albert Beinor, Ilhan Gundogan
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Patent number: 6681353Abstract: The invention is directed to techniques which use a test circuit within an FPGA device to obtain a trace of a digital signal used by normal operating circuitry of the FPGA device. The test circuit stores the trace in memory of the FPGA device which is accessible without the need of a logic analyzer (e.g., accessible in a memory mapped or I/O mapped manner). Accordingly, the deficiencies of a conventional built-in approach (e.g., including a mounted connector and connections by sacrificing circuit board area) and soldering approach (e.g., soldering wires to the circuit board requiring time and effort, and increasing the likelihood of signal distortion) for logic analyzer access are avoided. One arrangement of the invention is directed to a computer system having a bus, a processor coupled to the bus, and an FPGA device coupled to the bus.Type: GrantFiled: July 5, 2000Date of Patent: January 20, 2004Assignee: EMC CorporationInventor: Jonathan J. Barrow
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Patent number: 6678161Abstract: An electronic system includes electronic circuitry having a first portion and a second portion, and an electronic cabinet assembly that houses the electronic circuitry. The electronic cabinet assembly includes a first cabinet that houses the first portion of the electronic circuitry and a second cabinet that houses the second portion of the electronic circuitry. The first cabinet includes a first frame and a first set of exterior members that mounts to the first frame. Similarly, the second cabinet including a second frame and a second set of exterior members that mounts to the second frame. The electronic cabinet assembly further includes a set of connecting members that connects to (i) the first frame of the first cabinet and (ii) the second frame of the second cabinet to hold the first frame and the second frame side-by-side and rigidly in place relative to each other.Type: GrantFiled: November 29, 2001Date of Patent: January 13, 2004Assignee: EMC CorporationInventors: Edward Claprood, F. William French
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Patent number: 6672914Abstract: A bus bar mounting system has a frame assembly and a bus bar assembly. The frame assembly includes a chassis which is mountable within an equipment cabinet, and an interlocking portion that forms a unitary member with the chassis. The bus bar assembly includes a set of bus bars, and a bus bar block. The bus bar block includes (i) a base portion, each bus bar of the set of bus bars coupling to the base portion, and (ii) an interlocking portion that is configured to interlock with the interlocking portion of the frame assembly in order to retain the bus bar assembly in a fixed position relative to the frame assembly. The interlocking portion of the bus bar block forms a unitary member with the base portion of the bus bar block.Type: GrantFiled: July 27, 2001Date of Patent: January 6, 2004Assignee: EMC CorporationInventor: Edward Claprood
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Patent number: 6668262Abstract: The invention is directed to techniques for modifying a database. A database manager receives operation entries to be applied to a database. The database manager generates an error detection value for each operation entry as it is received, and enters both the operation entry and its associated error detection value in a journal. The database manager then copies the database to another version of the database, checks the validity of each operation entry using the error detection value, and, if the operation entry is valid, updates the copied version of the database based on the operation entry. The database manager also generates an error detection value for the database after it has been updated with all the operation entries from the journal. If there is a data corruption event, such as a power failure, then the database manager uses the error detection values for the operation entries and for the database during the database recovery process.Type: GrantFiled: November 9, 2000Date of Patent: December 23, 2003Assignee: Cisco Technology, Inc.Inventor: Michael R. Cook
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Patent number: 6643621Abstract: Mechanisms and techniques are provided which allow a server computer system, such as a web server, to generate information, such as a web page, which includes an audio resource locator (ARL) configured in accordance with the invention. The ARL includes a reference to audio data, an audio command,and an audio server reference that identifies an audio server computer system that can process the reference to audio data within the ARL according to the audio command within the ARL to producing output, which may be audio or another type of output. The server computer system can serve the information including the ARL to an originator of a request for such information, such as a browser on a client computer system. A client computer system configured with a browser can obtain the information containing the ARL and can reference the ARL which causes the client computer system to send a request to process audio data to the audio server specified in the ARL.Type: GrantFiled: September 14, 2000Date of Patent: November 4, 2003Assignee: Cisco Technology, Inc.Inventors: Lewis D. Dodrill, Ryan A. Danner, Steven J. Martin
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Patent number: 6639154Abstract: A circuit board includes (i) a section of circuit board material having a signal conductor, a ground conductor, and dielectric material that separates the signal conductor and the ground conductor, and (ii) a signal launch. The signal launch includes a signal via that contacts the signal conductor and the dielectric material of the section of circuit board material, a first set of ground vias and a second set of ground vias. The ground vias contact the ground conductor and the dielectric material of the section of circuit board material. The first set of ground vias is disposed a first radial distance from the signal via. The second set of ground vias is disposed a second radial distance from the signal via. A coaxial connector mounts to the signal launch of the circuit board in order to provide electrical access to the signal and ground conductors.Type: GrantFiled: October 10, 2000Date of Patent: October 28, 2003Assignee: Teradyne, Inc.Inventors: Marc Cartier, Mark Gailus
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Patent number: 6637641Abstract: A circuit board manufacturing system has a paste source, a circuit board processing apparatus, and a controller. The circuit board processing apparatus includes a carrier configured to receive a circuit board having (i) a section of circuit board material and (ii) virgin metallic surface mount pads supported by the section of circuit board material. The circuit board processing apparatus further includes a paste distribution assembly coupled to the carrier and to the paste source. The paste distribution assembly is configured to dispose a paste from the paste source onto a surface of the circuit board. The carrier further includes a surfacing assembly coupled to the carrier. The surfacing assembly is configured to move the paste over the surface of the circuit board to remove a portion of each virgin metallic surface mount pad. The controller is configured to selectively start and stop operations of the paste distribution and surfacing assemblies.Type: GrantFiled: May 6, 2002Date of Patent: October 28, 2003Assignee: EMC CorporationInventors: Stuart D. Downes, Jin Liang
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Patent number: 6636250Abstract: The invention provides a graphical user interface which can use a hierarchical form or style of presentation to depict and display hierarchical and non-hierarchical relationships and objects. In one configuration, the system of the invention displays icons on a graphical user interface on a display of a computer system and receives a user selection of an icon and receives a relationship selection selected by the user that corresponds to the icon selected by the user. The system then performs a relationship function identified by the relationship selection selected by the user. The relationship function is performed upon a descriptor in the memory system that is related, according to the relationship selection, to the icon selected by the user.Type: GrantFiled: April 12, 2000Date of Patent: October 21, 2003Inventor: Morrie Gasser
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Patent number: 6636418Abstract: An electronic system has electronic circuitry and an electronic cabinet that houses the electronic circuitry. The electronic cabinet includes a frame that holds the electronic circuitry, a set of exterior members that mounts to the frame, and a stabilization assembly. The stabilization assembly has a base portion that attaches to the frame of the electronic cabinet in order to support the frame of the electronic cabinet over a floor surface, a pedestal portion, and a positioner. The positioner is configured to position the pedestal portion of the stabilization assembly relative to the frame such that the pedestal portion of the stabilization assembly is substantially wider than the frame along a particular direction when the pedestal of the stabilization assembly portion resides in an operating position relative to the frame. The pedestal portion can prevent the electronic cabinet from inadvertently being knocked over if pushed in the particular direction.Type: GrantFiled: August 28, 2001Date of Patent: October 21, 2003Assignee: EMC CorporationInventors: Edward Claprood, Lawrence Pignolet, Gary Goulet, F. William French
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Patent number: 6631442Abstract: A data storage system includes methods and apparatus that provide volumes for access by host computing devices. The volumes can have a storage size that is independently configurable from an actual amount of data storage that may or may not be associated with the volume. The volumes also have a persistent identifier. The volumes can have any amount of associated storage space allocated to the volume, including none, within the data storage system. Since the storage size and associated storage space are each independently configurable from each other, host that interface with the data storage system can perceive the volumes as being larger than they really are. A dynamic volume configuration technique is provided which allows storage space within storage devices in the data storage system to be dynamically associated and disassociated (i.e., added and removed) from the volumes on an as-needed basis, without requiring disruption of host activities with respect to the volumes.Type: GrantFiled: June 29, 1999Date of Patent: October 7, 2003Inventor: Steven M. Blumenau
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Patent number: 6628610Abstract: Techniques are provided for controlling a flow of packets in a data communications device. A first technique involves transferring packets of a particular packet flow based on an initial policy scheme, and planning a scheme change to change the initial policy scheme to a new policy scheme based on conditions within the data communications device existing while transferring the packets of the particular flow based on the initial policy scheme. The first technique further involves providing a change signal to the source of a particular packet flow (e.g., a sending host). The change signal indicates that the data communications device has planned the scheme change. Additionally, the first technique involves processing the scheme change based on either a reply signal from, the source or an absence of a reply signal from the source.Type: GrantFiled: June 28, 1999Date of Patent: September 30, 2003Assignee: Cisco Technology, Inc.Inventors: John G. Waclawsky, Hamesh Chawla
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Patent number: 6628132Abstract: A semiconductor handling system has a temperature soak assembly to temperature soak a semiconductor structure (e.g., a panel), a test assembly to test the semiconductor structure, and a temperature desoak assembly to temperature desoak the semiconductor structure. The temperature desoak assembly includes (i) a heat sink that defines a surface which is configured to thermally couple with the semiconductor structure, (ii) a fluid guide coupled to the heat sink, and (iii) a fluid controller coupled to the fluid guide. The fluid controller provides a fluid (e.g., room temperature air) which the fluid guide directs over the heat sink to bring a temperature of the heat sink to a temperature of the fluid. This arrangement provides an effective low cost and low power means for temperature desoaking a semiconductor structure.Type: GrantFiled: August 10, 2001Date of Patent: September 30, 2003Assignee: Teradyne, Inc.Inventors: Andreas C. Pfahnl, John J. Dunn, Jr.
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Patent number: 6628513Abstract: A system is provided that may be used to mount mass storage devices so that they may be used in a mass storage system. The mass storage devices may include respective disk storage devices. Each of the disk storage devices may have a respective form factor that may be a respective one of two possible form factors (e.g., low profile or half-height form factor).Type: GrantFiled: June 7, 2001Date of Patent: September 30, 2003Assignee: EMC CorporationInventors: Brian Gallagher, Jeffrey Teachout, Thomas Linnell, Bernard Warnakulasooriya
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Patent number: 6623177Abstract: An electronic system having a set of circuit boards and an interconnect. Each of the set of circuit boards includes a set of fiber optic circuit board connectors. The interconnect includes (i) a first planar member, (ii) a second planar member that is substantially parallel to the first planar member, and (iii) a set of fiber optic cable assemblies. Each fiber optic cable assembly includes a fiber optic cable segment, a first fiber optic interconnect connector which fastens to one end of that fiber optic cable segment and a second fiber optic interconnect connector which fastens to another end of that fiber optic cable segment. Each fiber optic interconnect connector extends through a hole defined by one of the first and second planar members. Furthermore, each fiber optic interconnect connector is configured to engage with a fiber optic circuit board connector.Type: GrantFiled: July 9, 2001Date of Patent: September 23, 2003Assignee: EMC CorporationInventor: Kendell A. Chilton
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Patent number: 6625152Abstract: A server installation, which includes multiple servers, services a client request using a filter index that is different than a destination address associated with the client request. This enables clients to generate client requests for a server installation in a conventional manner without regard to whether a server installation is formed by one server or multiple servers. Accordingly, when a server installation is scaled by increasing the number of servers for redundancy, load distribution or capacity reasons, reconfiguration of the clients utilizing the servers is unnecessary. In one arrangement, the data resides in a data structure having (i) a device identifier that uniquely identifies the server host among multiple server hosts, and (ii) a filter index which is different than the device identifier.Type: GrantFiled: October 13, 1999Date of Patent: September 23, 2003Assignee: Cisco Technology, Inc.Inventors: Robert Monsen, Steven Berl, John G. Waclawsky
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Patent number: 6622272Abstract: The invention is directed to techniques for accessing an external device, e.g., a device under test (DUT), from an automatic test equipment (ATE) interfacing apparatus, e.g., a specialized tester or channel card device. In one arrangement, the ATE interfacing apparatus includes a test bus interface for connecting to a test bus of an automatic test system; an external device interface for connecting to an external device; and a translator, interconnected between the test bus interface and the external device interface. The translator receives a memory access instruction from the test bus through the test bus interface. The memory access instruction includes a command and a test bus address. The translator translates the test bus address into an identifier which identifies a portion of the external device, and accesses the identified portion of the external device through the external device interface based on the command and the identifier.Type: GrantFiled: March 10, 2000Date of Patent: September 16, 2003Assignee: Teradyne, Inc.Inventors: Bernhard K. Haverkamp, Lik Seng Lim
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Patent number: 6619854Abstract: The invention is directed to techniques for cleaning an optical interface pneumatically, i.e., using fluid (liquid or gas). Fluid can be delivered in an automated manner at a particular time (e.g., connection time) in order alleviate the burden of a technician having to manually clean the optical interface with conventional cleaning material or a stick-on adhesive each time the technician exposes the optical interface. One arrangement is directed to an optical connection system having a first optical connector and a second optical connector. The first optical connector includes a first optical connector housing and a first optical interface fastened to the first optical connector housing. The second optical connector includes a second optical connector housing and a second optical interface fastened to the second optical connector housing. The second optical connector housing defines an aperture that directs fluid over at least one of the first and second optical interfaces.Type: GrantFiled: January 31, 2001Date of Patent: September 16, 2003Assignee: Teradyne, Inc.Inventor: Sepehr Kiani
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Patent number: 6621692Abstract: A computerized system includes a chassis, computerized circuitry and an interface apparatus. The chassis has a circuit mounting portion and an interface mounting portion coupled together. The interface mounting portion includes a hinged platform. The computerized circuitry fastens to the circuit mounting portion of the chassis. The computerized circuitry has a computerized circuitry communications port. The interface apparatus has a frame that is configured to fasten to and detach from the hinged platform of the interface mounting portion of the chassis, and a console that attaches to the frame. The console includes an input device, an output device and a console communications port. The interface apparatus further includes a cable assembly having a first end that electrically connects with the console communications port and a second end that is configured to electrically connect with the computerized circuitry communications port.Type: GrantFiled: August 30, 2001Date of Patent: September 16, 2003Assignee: EMC CorporationInventors: Keith Johnson, Edward Claprood
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Patent number: D486494Type: GrantFiled: September 24, 2002Date of Patent: February 10, 2004Assignee: EMC CorporationInventors: C. Ilhan Gundogan, Gerald J. Cote, Albert F. Beinor, Jr., Joseph P. King, Jr., Joseph P. DeYesso, W. Brian Cunningham, Steven R. Cieluch