Abstract: A system and method of pushing user-selected data items from a host system to a user's mobile data communication device upon detecting the occurrence of one or more user-defined event triggers is provided. The user may then move (or file) the data items to a particular folder within a folder hierarchy stored in the mobile data communication device, or may execute some other system operation on the data item. Software operating at the mobile device and the host system then synchronizes the folder hierarchy of the mobile device with a folder hierarchy of the host system, and any actions executed on the data items at the mobile device are then automatically replicated on the same data items stored at the host system, thus eliminating the need for the user to manually replicate actions at the host system that have been executed at the mobile data communication device.

Abstract: An impedance matching low noise amplifier (“LNA”) having a bypass switch includes an amplification circuit, a bypass switching network and a match adjustment circuit. The amplification circuit has an amplifier input and an amplifier output, and is configured to receive a radio frequency (RF) input signal at the amplifier input and apply a gain to generate an amplified RF output signal at the amplifier output. The bypass switching network is coupled to a low-gain control signal and is also coupled between the amplifier input and the amplifier output. The bypass switching network is configured to couple the amplifier input to the amplifier output when the low-gain control signal is enabled in order to feed the RF input signal through to the RF output signal. The match adjustment circuit is coupled to the low-gain control signal and the RF input signal, and is configured to couple the RF input signal to an impedance when the low-gain control signal is enabled.

Abstract: A clock circuit comprises an analog clock element, a digital clock element, and a controller. The analog clock element is configured to generate an oscillating output. The digital clock element is configured to generate a digital clock output. The controller is configured to switch between the analog clock element and the digital clock element. The oscillating output and the digital clock output have substantially equivalent frequencies.

Abstract: A multiple-element antenna is provided that includes a monopole portion and a dipole portion. The monopole portion has a top section, a middle section, and a bottom section. The middle section defines a recess between the top and bottom sections, and the bottom section includes a monopole feeding port configured to couple the monopole portion of the multiple-element antenna to communications circuitry in a mobile communication device. The dipole portion has at least one dipole feeding port configured to couple the dipole portion of the multiple-element antenna to communications circuitry in the mobile communications device. The dipole portion of the multiple-element antenna is positioned within the recess defined by the monopole portion of the multiple-element antenna in order to electromagnetically couple the monopole portion with the dipole portion.

Abstract: An automatic gain control (AGC) and DC estimation and correction technique for wireless communication devices is provided. An AGC signal, which controls a gain applied to a received signal by a gain stage to generate a scaled signal, is assigned one of a relatively small number of values in accordance with the amplitude of the scaled signal. An estimate of a DC offset in the scaled signal corresponding to each value of the AGC signal is stored in a memory. A DC estimation arrangement then reads the stored estimate associated with the particular value of the AGC signal from the memory and generates a current DC estimate based thereon. The current estimate is then used to correct the scaled signal for DC offset and to update the stored estimate.

Abstract: An adaptive noise suppression system includes an input A/D converter, an analyzer, a filter, and a output D/A converter. The analyzer includes both feed-forward and feedback signal paths that allow it to compute a filtering coefficient, which is input to the filter. In these paths, feed-forward signal are processed by a signal to noise ratio estimator, a normalized coherence estimator, and a coherence mask. Also, feedback signals are processed by a auditory mask estimator. These two signal paths are coupled together via a noise suppression filter estimator. A method according to the present invention includes active signal processing to preserve speech-like signals and suppress incoherent noise signals. After a signal is processed in the feed-forward and feedback paths, the noise suppression filter estimator then outputs a filtering coefficient signal to the filter for filtering the noise out of the speech and noise digital signal.

Abstract: A PLL-based frequency synthesizer is provided. In accordance with one aspect, a phase locked loop is provided that comprises a phase detector, a loop filter, a voltage controlled oscillator, and a feedback circuit. The phase detector has as inputs a reference frequency signal and a feedback signal. The phase detector is operable to generate a phase detection signal based on a comparison of phases between the reference frequency signal and the feedback signal. The loop filter is coupled to the phase detector for receiving the phase detection signal and generates an output voltage in response to the phase detection signal. The voltage controlled oscillator is coupled to the output voltage of the loop filter and generates a local oscillator signal. The feedback circuit is coupled to the local oscillator signal and generates the feedback signal. The feedback circuit comprises a sampling circuit.

Abstract: A hand-held electronic device with a keyboard optimized for use with the thumbs is disclosed. In order to operate within the limited space available on a hand-held electronic device, the present invention optimizes the placement and shape of the keys, preferably using keys that are oval or oblong in shape, and that are placed at angles designed to facilitate thumb-typing. The angles at which keys on either side of the keyboard are placed is complimentary.

Abstract: A clock signal duty cycle control circuit is provided that receives an incoming signal from a clock signal input source and generates an improved output clock signal having an accurately controlled duty cycle. The circuit controls the duty cycle of the output clock signal by comparing the incoming signal to a reference value in a comparator. The reference value is derived from a reference charge stored on a capacitor. The reference charge is built up in the capacitor using the currents from a current source and a current sink, which are controlled using translated output signals from the comparator.

Abstract: An adaptive tuning method for a wireless communication device determines the impedance of a matching circuit relative to an impedance to be matched and adjusts the impedance of the matching circuit accordingly. A passive surface acoustic wave (SAW) device includes multiple terminated interdigital transducers (IDTs) which generate reflected SAWs when excited by incident SAWs, each reflected SAW having magnitude and phase characteristics dependent upon the particular IDT termination. According to the invention, the IDT terminations include the impedance matching circuit and the impedance to be matched. Input IDTs in the SAW device are excited with electrical signals, which are converted to generate the incident SAWs. The resultant reflected SAWs are converted by output IDTs into output electrical signal signals which can then be analyzed to determine magnitude and phase differences between the output electrical signal signals and generate an impedance matching circuit control signal based thereon.

Abstract: A portable electronic device includes a log-structured file system implemented in flash memory, The log-structured file system includes a write function for storing contiguous data records to the flash memory in the form of at least one data log, although the system may write data records to the flash memory using a plurality of data logs. The log-structured file system also includes a read function for retrieving data records from the one or more logs using a plurality of memory mapped pointers, which may be stored in an associated RAM index, or which may be implemented as an index stored in the flash memory. A clean-log function is also provided for eliminating inactive records from the log so that new data can be appended to the end of the log. The various functions associated with the log-structured file system are implemented as at least three software modules, a read module, a write module and a clean-log module, although other configurations are possible.

Abstract: A hand-held electronic device with a keyboard, thumbwheel, display and associated software is optimized for use of the device with the thumbs. The associated software has a plurality of features to optimize efficient use of the limited keyboard space and encourage the use of the device by thumb-based data entry through the thumbwheel and/or through a combination of minimal number of keystrokes. Software features include international character scrolling, and auto-capitalization. The keys on the device keyboard are optimally shaped and configured for thumb-based input. In addition, the thumbwheel is inclined between the front and a side edge of the device so as to be reachable by either the thumb or index finger of the user's hand at the side edge of the device.

Abstract: A direct digital frequency synthesizer and a hybrid frequency synthesizer combining the direct digital frequency synthesizer and a phase locked loop is provided. The direct digital frequency synthesizer includes a phase accumulator that is configured to generate a discrete phase signal. Spurious phase modulation in the discrete phase signal is reduced by a noise shaper, and the output of the noise shaper is then used to address a phase-to-amplitude translator. The phase-to-amplitude translator generates a discrete waveform which is converted to a continuous waveform by a digital to analog converter. The hybrid frequency synthesizer uses a mixer to combine a reference frequency generated by a reference source and a DDFS output signal generated by a direct digital frequency synthesizer. The output from the mixer is then coupled to the input of a phase locked loop which multiplies the mixer output to generate the frequency synthesizer output.

Abstract: A system and method for transporting user-restricted data from a gateway device to a handheld viewing device is provided. The gateway device includes an information translator, content filters, and storage. The information translator delivers content from an information database coupled to the gateway to the handheld viewing device. A viewing component of the handheld device receives all possible data from the gateway device that the handheld device is capable of viewing. The user of the handheld device is then able to manually select certain portions of data through a user interface. Once the selection is complete, a series of comments are returned to the gateway device from the handheld device so that a subsequent viewing corresponds only to that information selected by the user.

Abstract: An adaptive noise suppression system includes an input A/D converter, an analyzer, a filter, and a output D/A converter. The analyzer includes both feed-forward and feedback signal paths that allow it to compute a filtering coefficient, which is input to the filter. In these paths, feed-forward signal are processed by a signal to noise ratio estimator, a normalized coherence estimator, and a coherence mask. Also, feedback signals are processed by a auditory mask estimator. These two signal paths are coupled together via a noise suppression filter estimator. A method according to the present invention includes active signal processing to preserve speech-like signals and suppress incoherent noise signals. After a signal is processed in the feed-forward and feedback paths, the noise suppression filter estimator then outputs a filtering coefficient signal to the filter for filtering the noise out of the speech and noise digital signal.