Patents Represented by Attorney, Agent or Law Firm Charles Guenzer
  • Patent number: 7696549
    Abstract: A functional perovskite cell formed on a silicon substrate layer and including a functional layer of bismuth ferrite (BiFeO3 or BFO) sandwiched between two electrode layers. An optional intermediate template layer, for example, of strontium titanate allows the bismuth ferrite layer to be crystallographically aligned with the silicon substrate layer. Other barrier layers of platinum or an intermetallic alloy produce a polycrystalline BFO layer. The cell may be configured as a non-volatile memory cell or a MEMS structure respectively depending upon the ferroelectric and piezoelectric character of BFO. Lanthanum substitution in the BFO increases ferroelectric performance. The films may be grown by MOCVD using a heated vaporizer.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: April 13, 2010
    Assignee: University of Maryland
    Inventor: Ramamoorthy Ramesh
  • Patent number: 7270761
    Abstract: A fluorine-free integrated process for plasma etching aluminum lines in an integrated circuit structure including an overlying anti-reflection coating (ARC) and a dielectric layer underlying the aluminum, the process being preferably performed in a single plasma reactor. The ARC open uses either BCl3/Cl2 or Cl2 and possibly a hydrocarbon passivating gas, preferably C2H4. The aluminum main etch preferably includes BCl3/Cl2 etch and C2H4 diluted with He. The dilution is particularly effective for small flow rates of C2H4. An over etch into the Ti/TiN barrier layer and part way into the underlying dielectric may use a chemistry similar to the main etch. A Cl2/O2 chamber cleaning may be performed, preferably with the wafer removed from the chamber and after every wafer cycle.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: September 18, 2007
    Assignee: Appleid Materials, Inc
    Inventors: Xikun Wang, Hui Chen, Anbei Jiang, Hong Shih, Steve S. Y. Mak
  • Patent number: 6727191
    Abstract: A process for hydrogen annealing silicon wafers that have been cut from an ingot and polished on both sides, thereby removing crystal originated pits (COPs) in their surface. The wafers are then stacked in a tower having at least support surfaces made from virgin polysilicon, that is, polysilicon form by chemical vapor deposition, preferably from monosilane. The tower may include four virgin polysilicon legs have support teeth slotted along the legs and fixed at their opposed ends to bases. The wafers are supported at four equally distributed points at 0.707 of the wafer radius. The wafers so supported on the virgin polysilicon towers are annealed in a hydrogen ambient at 1250° C. for 12 hours.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: April 27, 2004
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, James E. Boyle, Laurence D. Delaney
  • Patent number: 6545420
    Abstract: A domed plasma reactor chamber uses an antenna driven by RF energy (LF, MF, or VHF) which is inductively coupled inside the reactor dome. The antenna generates a high density, low energy plasma inside the chamber for etching metals, dielectrics and semiconductor materials. Auxiliary RF bias energy applied to the wafer support cathode controls the cathode sheath voltage and controls the ion energy independent of density. Various magnetic and voltage processing enhancement techniques are disclosed, along with etch processes, deposition processes and combined etch/deposition processed. The disclosed invention provides processing of sensitive devices without damage and without microloading, thus providing increased yields.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: April 8, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Craig A. Roderick, John R. Trow, Chan-Lon Yang, Jerry Yuen-Kui Wong, Jeffrey Marks, Peter R. Keswick, David W. Groechel, Jay D. Pinson, II, Tetsuya Ishikawa, Lawrence Chang-Lai Lei, Masato M. Toshima
  • Patent number: 6543286
    Abstract: Pulse-width modulation (PWM) drive circuitry particularly applicable to an array of electrostatic actuators formed in a micro electromechanical system (MEMS), such as used for optical switching. A control cell associated with each actuator includes a register selectively stored with a desired pulse width. A clocked counter distributes its outputs to all control cells. When the counter matches the register, a polarity signal corresponding to a drive clock is latched and controls the voltage applied to the electrostatic cell. In a bipolar drive, one actuator electrode is driven by a drive clock; the other, by the latch. The MEMS element may be a tiltable plate supported in its middle by a torsion beam. Complementary binary signals may drive two capacitors formed across the axis of the beam. The register and comparison logic for each cell may be formed by a content addressable memory.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: April 8, 2003
    Assignee: Movaz Networks, Inc.
    Inventors: Steven L. Garverick, Michael L. Nagy
  • Patent number: 6399514
    Abstract: A plasma process for etching oxide and having a high selectivity to silicon including flowing into a plasma reaction chamber a fluorine-containing etching gas and maintaining a temperature of an exposed silicon surface within said chamber at a temperature of between 200° C. and 300° C. An example of the etching gas includes SiF4 and a fluorocarbon gas. The plasma may be generated by a capacitive discharge type plasma generator or by an electromagnetically coupled plasma generator, such as an inductively coupled plasma generator. The high selectivity exhibited by the etch process permits use of an electromagnetically coupled plasma generator, which in turn permits the etch process to be performed at low pressures of between 1 and 30 milliTorr, resulting the etching of vertical sidewalls in the oxide layer.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: June 4, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey Marks, Jerry Yuen-Kui Wong, David W. Groechel, Peter R. Keswick, Chan-Lon Yang
  • Patent number: 6399511
    Abstract: A dielectric etch process applicable etching a dielectric layer with an underlying stop layer. It is particularly though not necessarily applicable to forming a dual-damascene interconnect structure by a counterbore process, in which a deep via is etched prior to the formation of a trench connecting two of more vias. A single metallization fills the dual-damascene structure. The substrate is formed with a lower stop layer, a lower dielectric layer, an upper stop layer, and an upper dielectric layer. For example, the dielectric layers may be silicon dioxide, and the stop layers, silicon nitride. The initial deep via etch includes at least two substeps. A first substep includes a non-selective etch through the upper stop layer followed by a second substep of selectively etching through the lower dielectric layer and stopping on the lower stop layer. The first substep may be preceded by yet another substep including a selective etch part ways through the upper dielectric layer.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: June 4, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Betty Tang, Jian Ding
  • Patent number: 6387287
    Abstract: An oxide etching process, particularly useful for selectively etching oxide over a feature having a non-oxide composition, such as silicon nitride and especially when that feature has a corner that is prone to faceting during the oxide etch. The invention uses one of three hydrogen-free fluorocarbons having a low F/C ratio, specifically hexafluorobutadiene (C4F6), hexafluorocyclobutene (C4F6), and hexafluorobenzene (C6F6). At least hexafluorobutadiene has a boiling point below 10° C. and is commercially available. The fluorocarbon together with a substantial amount of a noble gas such as argon is excited into a high-density plasma in a reactor which inductively couples plasma source power into the chamber and RF biases the pedestal electrode supporting the wafer. Preferably, one of two two-step etch process is used. In the first, the source and bias power are reduced towards the end of the etch.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: May 14, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Hoiman Hung, Joseph P Caulfield, Hongqing Shan, Ruiping Wang, Gerald Zheyao Yin
  • Patent number: 6362109
    Abstract: A single-step plasma etch process for etching both oxide and nitride selectively to photoresist and silicon. The etching gas includes a fluorocarbon, difluoromethane, oxygen, and carbon monoxide. The fluorocarbon is preferably hydrogen free. Preferred fluorocarbons are hexafluorobutadiene (C4F6), octafluorocyclobutane (C4F8), and carbon tetrafluoride (CF4), of which C4F6 is the most preferred. Approximately equal amounts are supplied of the fluorocarbon, difluoromethane, and oxygen and a significantly larger amount of carbon monoxide. The chemistry is also applicable to etching organo silicate glass selectively to photoresist.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: March 26, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Yungsang Kim, Takehiko Komatsu, Claes H. Bjorkman, Hongqing Shan
  • Patent number: 6361705
    Abstract: A plasma etch process, particularly applicable to an self-aligned contact etch in a high-density plasma for selectively etching oxide over nitride, although selectivity to silicon is also achieved. In the process, a fluoropropane or a fluoropropylene is a principal etching gas in the presence of a substantial amount of an inactive gas such as argon. Good nitride selectivity has been achieved with hexafluoropropylene (C3F6), octafluoropropane (C3F8), heptafluoropropane (C3HF7), hexafluoropropane (C3H2F6). The process may use one or more of the these gases in proportions to optimize selectivity and a wide process window. Difluoromethane (CH2F2) or other fluorocarbons may be combined with the above gases, particularly with C3F6 for optimum selectivity over other materials without the occurrence of etch stop in narrow contact holes and with a wide process window.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: March 26, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Ruiping Wang, Gerald Z. Yin, Hao A. Lu, Robert W. Wu, Jian Ding
  • Patent number: 6357432
    Abstract: A method of fabricating support members for wafer processing fixtures and the produce are disclosed. In the first step of the method, an elongate support member basic form is provided. The basic form has a substantially wedge-shaped cross-section and angular comers. A plurality of wafer-retaining slots are cut along one side of the support member basic form. The support member basic form can include a front surface and a rear surface, with at least one angular comer occurring on each of the surfaces. The comers have a larger radius on the rear than in the front. Attachment structures on terminal ends can be fixed to bases. The elongate support member basic form can be fabricated from an inert crystalline material, such as polycrystalline silicon or monocrystalline silicon.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: March 19, 2002
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Zehavi, Robert Davis
  • Patent number: 6326307
    Abstract: A photoresist plasma pretreatment performed prior to a plasma oxide etch. The plasma pretreatment is performed with an argon plasma or a carbon tetrafluoride and trifluoromethane plasma with lower power than in the main etch or is performed with a plasma of difluoromethane or trifluoromethane and carbon monoxide but no argon diluent gas. Thereby, striations on the oxide wall are reduced.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: December 4, 2001
    Assignee: Appllied Materials, Inc.
    Inventors: Roger A. Lindley, Henry Fong, Yunsang Kim, Takehito Komatsu, Ajey M. Joshi, Bryan Y. Pu, Hongqing Shan
  • Patent number: 6308654
    Abstract: A plasma reactor appropriate for fabrication, especially etching, of semiconductor integrated circuits and similar processes in which the chamber has a top comprising a truncated conical dome and, preferably, a counter electrode disposed at the top of the conical dome. An RF coil is wrapped around the conical dome to inductively couple RF energy into a plasma within the chamber dome. The dome temperature can be controlled in a number of ways. A heat sink can be attached to the outside rim of the dome. A rigid conical thermal control sheath can be fit to the outside of the dome, and any differential thermal expansion between the two is accommodated by the conical geometry, thus assuring good thermal contact. The rigid thermal control sheath can include resistive heating, fluid cooling, or both. Alternatively, a flexible resistive heater can be wrapped around the dome inside the RF coil.
    Type: Grant
    Filed: October 18, 1996
    Date of Patent: October 30, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Gerhard Schneider, Viktor Shel, Andrew Nguyen, Robert W. Wu, Gerald Z. Yin
  • Patent number: 6284149
    Abstract: A plasma etching process for etching a carbon-based low-k dielectric layer in a multi-layer inter-level dielectric. The low-k dielectric may be divinyl siloxane-benzocyclobutene (BCB), which contains about 4% silicon, the remainder being carbon, hydrogen, and a little oxygen. The BCB etch uses an etching gas of oxygen, a fluorocarbon, and nitrogen and no argon. An N2/O2 ratio of between 1:1 and 3:1 produces vertical walls in the BCB. In a dual-damascene structure, the inter-level dielectric includes two BCB layers, each underlaid by a respective stop layer. Photolithography with an organic photoresist needs a hard mask of silicon oxide or nitride over the upper BCB layer. After the BCB etch has cleared all the photoresist, the bias power applied to the cathode supporting the wafer needs to be set to a low value while the separately controlled plasma source power is set reasonably high, thereby reducing faceting of the exposed hard mask.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: September 4, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Zongyu Li, Karsten Schneider, Axel Walter, Jian Ding
  • Patent number: 6211092
    Abstract: A dielectric etch process particularly applicable to forming a dual-damascene interconnect structure by a counterbore process, in which a deep via is etched prior to the formation of a trench connecting two of more vias. A single metallization fills the dual-damascene structure. The substrate is formed with a lower stop layer, a lower dielectric layer, an upper stop layer, and an upper dielectric layer. For example, the dielectric layers may be silicon dioxide, and the stop layers, silicon nitride. The initial deep via etch includes at least two substeps. A first substep includes a non-selective etch through the upper stop layer followed by a second substep of selectively etching through the lower dielectric layer and stopping on the lower stop layer. The first substep may be preceded by yet another substep including a selective etch part ways through the upper dielectric layer.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: April 3, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Betty Tang, Jian Ding
  • Patent number: 6183655
    Abstract: A plasma etch process, particularly applicable to a self-aligned contact etch or other advanced structures requiring high-selectivity to nitride or other non-oxide materials and producing no etch stop. The process is preferably performed in a high-density plasma reactor for etching holes with either high or low aspect rations. In this process, hexafluoropropylene (C3F6) is the principal etching gas and another hydrofluorocarbon such as CH2F2 or C3H2F6 is added at least in part for its polymer-forming ability, which increases selectivity of etching oxide to nitride. The process gas also includes a substantial amount of an inactive gas such as argon. The process gas mixture can be balanced between the active etching gas and the polymer former in proportions to optimize selectivity over other materials without the occurrence of etch stop in narrow contact holes and with a wide process window.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: February 6, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Ruiping Wang, Gerald Z. Yin, Robert W. Wu, Jian Ding
  • Patent number: 6174451
    Abstract: An oxide etching process, particular useful for selectively etching oxide over a feature having a non-oxide composition, such as silicon nitride and especially when that feature has a corner that is prone to faceting during the oxide etch. The invention uses one of three unsaturated 3- and 4-carbon fluorocarbons, specifically hexafluorobutadiene (C4F6), pentafluoropropylene (C3HF5), and trifluoropropyne (C3HF3), all of which have boiling points below 10° C. and are commercially available. The unsaturated hydrofluorocarbon together with argon is excited into a high-density plasma in a reactor which inductively couples plasma source power into the chamber and RF biases the pedestal electrode supporting the wafer. Preferably, a two-step etch is used process is used in which the above etching gas is used in the main step to provide a good vertical profile and a more strongly polymerizing fluorocarbon such as difluoromethane (CH2F2) is added in the over etch to protect the nitride corner.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: January 16, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Raymond Hung, Joseph P. Caulfield, Hongching Shan, Ruiping Wang, Gerald Z. Yin
  • Patent number: 6171974
    Abstract: A plasma etch process for oxide having high selectivity to silicon is disclosed comprising the use of a mixture of SiF4 and one or more other fluorine-containing etch gases in an etch chamber maintained within a pressure range of from about 1 milliTorr to about 200 milliTorr. Preferably, the etch chamber also contains an exposed silicon surface. The plasma may be generated by a capacitive discharge type plasma generator, if pressures of at least about 50 milliTorr are used, but preferably the plasma is generated by an electromagnetically coupled plasma generator. The high selectivity exhibited by the etch process of the invention permits use of an electromagnetically coupled plasma generator which, in turn, permits operation of the etch process at reduced pressures of preferably from about 1 milliTorr to about 30 milliTorr resulting in the etching of vertical sidewall openings in the oxide layer.
    Type: Grant
    Filed: January 24, 1992
    Date of Patent: January 9, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey Marks, Jerry Yuen-Kui Wong, David W. Groechel, Peter R. Keswick, Chan-Lon Yang
  • Patent number: 6168726
    Abstract: A process for etching an oxidized organo-silane film exhibiting a low dielectric constant and having a most preferred atomic composition of 52% hydrogen, 8% carbon, 19% silicon, and 21% oxygen. The process of etching deep holes in the organo-silane film while stopping on a nitride or other non-oxide layer is preferably performed in an inductively coupled high-density plasma reactor with a main etching gas mixture of a fluorocarbon, such as C4F8, and argon while the pedestal electrode supporting the wafer is RF biased. For very deep and narrow holes, oxygen or nitrogen may be added to volatize carbon. In an integrated process in which an oxygen plasma is used either for the film etching or for post-etch treatments such as ashing or nitride removal, the oxygen plasma should be excited only when no RF bias is applied to the pedestal electrode, and thereafter the sample should be annealed in an inert environment to recover the low dielectric constant.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: January 2, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Zongyu Li, Jian Ding, Mehul Naik
  • Patent number: 6120640
    Abstract: A plasma etch reactor having interior surfaces facing the plasma composed of boron carbide, preferably principally composed of B.sub.4 C. The boron carbide may be a bulk sintered body or may be a layer of boron carbide coated on a chamber part. The boron carbide coating may be applied by thermal spraying, such as plasma spraying, by chemical vapor deposition, or by other layer forming technique such as a surface converting reaction. The boron carbide is highly resistant to high-density plasma etchants such as BCl.sub.3. The plasma sprayed coating is advantageously applied to only a portion of an anodized aluminum wall. The boron carbide may be sprayed over the exposed portion of the aluminum over which the anodization has been removed. A band of the aluminum substrate at the transition between the anodization and the boron carbide is roughened prior to anodization so that the boron carbide sticks to the correspondingly roughened surface of the anodization.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: September 19, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Hong Shih, Nianci Han, Steve S. Y. Mak, Gerald Zheyao Yin