Abstract: This is a microelectronic multilayer circuit structure having circuit compatibility encapsulated within the circuit package including conductive electrical interconnection means formed by uniquely metallizing the "via" and/or blind interconnection holes within the circuit package. The assembly process provides means of uniformly metallizing the interlayer connecting holes.
Type:
Grant
Filed:
September 27, 1974
Date of Patent:
December 21, 1976
Assignee:
International Business Machines Corporation
Inventors:
Octavio I. Chirino, Joseph Hromek, Kailash C. Joshi, George C. Phillips, Jr.