Patents Represented by Attorney, Agent or Law Firm Charles W. Bethards
  • Patent number: 7907685
    Abstract: A GMSK receiver with interference cancellation includes a linear equalizer configured to be coupled to a received signal from a first antenna and to provide first soft bits, an adaptive estimator, e.g., adaptive MLSE coupled to the first soft bits and configured to provide second soft bits; a quality assessor coupled to the first soft bits and configured to provide a quality indication; and a switching function coupled to the linear equalizer and the adaptive MLSE and controlled in accordance with the quality indication to provide output soft bits corresponding to at least one of the first soft bits and the second soft bits. The GMSK receiver can be extended to multiple antennas and corresponding methods for interference cancellation in a GMSK signal are discussed.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: March 15, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Weizhong Chen
  • Patent number: 7872974
    Abstract: A wireless communication method comprises selecting a cause of a disruption from two or more potential causes of disruptions by associating at least one characteristic of a communication with a device with the selected cause of a disruption and changing a data rate for the communication from an existing data rate to a new data rate based upon the at least one characteristic of the communication.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: January 18, 2011
    Assignee: Freescale Semiconductor Inc.
    Inventors: Vijay K. Ujjain, Pamela A. Cereck
  • Patent number: 7856073
    Abstract: A radio receiver includes a communication interface, a mixing module, an analog to digital converter, a digital gain block, and a gain setting block. The communication interface receives a continuous time radio signal. The mixing module down converts the continuous time radio signal to a continuous time analog signal. The analog to digital converter converts the continuous time analog signal to a sequence of input digital samples. The digital gain block receives the sequence of input digital samples and gain adjusts the sequence of input digital samples based upon a gain setting to produce a sequence of output digital samples. The gain setting block produces the gain setting at any time as one of a first fixed gain setting, a second fixed gain setting, and a filtered time varying gain when transitioning between the first fixed gain setting and the second fixed gain setting.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: December 21, 2010
    Assignee: Sigma Tel, Inc.
    Inventor: Michael R. May
  • Patent number: 7852915
    Abstract: Adaptive equalizers for a communication channel and corresponding methods of equalizing are described. The adaptive equalizer includes: a fixed pre-filter configured to be coupled to a received signal and provide a pre-filter signal; an adaptive filter coupled to and configured to compensate the pre-filter signal for changes in phase and amplitude; and an interference remover coupled to the adaptive filter and configured to reduce interference in the received signal.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: December 14, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Weizhong Chen
  • Patent number: 7847177
    Abstract: Digital complex tone generators include a first tone generator configured to generate a first digital tone with selectable first characteristics including a first frequency, a first phase, and a first amplitude; a second tone generator configured to generate a second digital tone with selectable second characteristics including a second frequency, a second phase, and a second amplitude; and a generator adder configured for combining the first tone and the second tone to provide a digital complex tone with programmable characteristics. Corresponding methods include initializing a first and second tone generators based on, respective, selected frequencies, phases, and amplitudes; iteratively generating a first digital tone and a second digital tone; and combining these two tones to provide the digital complex tone.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: December 7, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Hari Thirumoorthy
  • Patent number: 7822131
    Abstract: Methods and corresponding systems for reducing a peak-to-average signal ratio include determining peak and null samples of a symbol. Thereafter, an error signal is calculated that is responsive to the peak and null samples. In one embodiment the error signal has values corresponding to differences between the peak samples and a high threshold and the null samples and a low threshold. In response to the error signal, a reserved tone set of time-domain samples are produced and added to a user data set of time-domain samples. The error signal can also be used to adapt a filter for filtering samples of a symbol.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: October 26, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ning Chen, Jeffrey Keating, James W. McCoy
  • Patent number: 7787357
    Abstract: A frequency offset estimator (400) and corresponding method (600) provides a frequency offset estimate (415) for an OFDM signal. The estimator comprises a data parser (403) coupled to an input signal (401) and arranged to select a group of symbols (305-311) or corresponding samples corresponding to predetermined symbols from the input signal and a processor (405) arranged to provide a correlation corresponding to the symbols, where the correlation corresponds to a frequency offset estimation for the input signal and is determined in a sequential fashion so that the correlation is provided concurrently with the last symbol or sample of the group of symbols to be selected.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: August 31, 2010
    Assignee: Motorola, Inc.
    Inventors: Brian Todd Kelley, Sekchin Chang
  • Patent number: 7734356
    Abstract: Methods and corresponding systems for controlling a light fixture include a memory for storing data and software. A multi-tap capacitor has a plurality of tap capacitors integrated into a capacitor housing. A plurality of switches are each coupled to one of the plurality of tap capacitors for selectively coupling the tap capacitors together to produce a variable multi-tap capacitance. A processor is coupled to the memory and the switches to facilitate: detecting a trigger for changing a lumen level output by the light fixture; determining a new lumen level in response to the trigger; determining a capacitance value that corresponds to the new lumen level; and configuring the plurality of switches to produce the multi-tap capacitance that corresponds to the new lumen level. The processor can record data in the memory that represents times of lumen changes and switch settings, which data correlates to power consumption.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 8, 2010
    Assignee: Streetlight Intelligence, Inc.
    Inventors: Donald A. Cleland, Laurence E. Kubek, Carol A. Wong, Yong Jeong Cho, James A. Anderson, Colleen D. McCarthy, Pratibha Sharma, Gregory P. Jacklin, Gerald E. Kurz
  • Patent number: 7733181
    Abstract: Methods and corresponding systems for amplifying an input signal include inputting first and second differential input signals into first and second circuit legs, respectively, wherein the first circuit leg includes a first transistor coupled in series with a first variable current source, and wherein the second circuit leg includes a second transistor coupled in series with a second variable current source. The first and second variable current sources are dynamically set to provide first and second bias currents in response to the first and second differential input signals, wherein the first bias current is set inversely proportional to the second bias current. The first and second bias currents are sunk in the first and second circuit legs, respectively. First and second differential output signals are output from the first and second circuit legs, respectively.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: June 8, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kent Jaeger, Lawrence E. Connell
  • Patent number: 7720448
    Abstract: A signal generation power management control system (100) for use in a portable communications device includes a digital signal processor (DSP) (101) for processing a digital source input and providing a digital processed bit stream A digital-to-analog converter (DAC) (103) is used for converting the digital processed bit stream to provide an analog signal. A power management controller (115) within the DSP (101) is then used for interpreting control parameters of signal processing components used within the portable communications device and dynamically adjusting the bias current of these components based on minimal signal requirements of the analog signal.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: May 18, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Raul Salvi, Cesar Carralero, Steven P. Hoggarth
  • Patent number: 7693242
    Abstract: Methods (1500) and corresponding systems (400, 500) for determining and correcting a DC offset in a receiver operate to sample (1503) a signal to provide complex samples; estimate (1505) a Direct Current (DC) offset corresponding to each of the complex samples, the estimating the DC offset further including solving a plurality of equations relating to the plurality of complex samples, e.g., N simultaneous equations in N samples with a power of the signal invariant across the N samples, to deterministically derive offset values; and then remove (1517) the DC offset from the signal.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: April 6, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Charles L. Sobchak, Mahibur Rahman
  • Patent number: 7693128
    Abstract: Methods (400, 500) and corresponding systems (100, 200, 300) for managing a packet (318) for transmission include obtaining a quality of service (QoS) parameter value for a data stream (404), and determining one or more QoS statistics for previously transmitted data (406). Thereafter, a packet is selected from the data stream (408), and scheduling information is estimated for the packet (410) based upon the QoS statistics and the QoS parameter value. The scheduling information is assigned (414) to the packet. A transmission time window of a transmission buffer is determined (506). If the scheduling information assigned to the packet falls within the transmission time window (508), the packet is queued for transmission in the transmission buffer. The labeled packet can be arranged among one or more queued packets in response to comparing scheduling information of the labeled packet and the queued packets.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: April 6, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Peilin Yao
  • Patent number: 7676206
    Abstract: A radio receiver front-end includes a tunable antenna interface and a low noise amplifying section. The tunable antenna interface is operably coupled to receive a wide bandwidth signal from an antenna, wherein the wide bandwidth signal includes a plurality of channel signals, and wherein the tunable antenna interface is tuned to pass a selected one of the plurality of channel signals substantially unattenuated and to attenuate remaining ones of the plurality of channel signals to produce a filtered wide bandwidth signal. The low noise amplifying section is operably coupled to amplify the filtered wide bandwidth signal to produce a filtered and amplified wide bandwidth signal.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: March 9, 2010
    Assignee: Sigmatel, Inc.
    Inventors: Lawrence Henry Ragan, Matthew D. Felder, Jingyu Hu, Jamie Joseph Happ, Michael R. May
  • Patent number: 7675844
    Abstract: A method of acquiring, at a receiver, fine timing synchronization for an Orthogonal Frequency Division Multiplexing (OFDM) signal as transported over a channel, includes determining an impulse response of the channel; dynamically creating a window function corresponding to the impulse response; and selecting a multiplicity of samples of the OFDM signal in accordance with the window function, where the multiplicity of samples are time aligned with an OFDM demodulator. A corresponding synchronizer includes a correlator for cross correlating a received preamble with a known preamble to provide an impulse response corresponding to the channel; a window generator configured to dynamically create a window function corresponding to the impulse response; and a selector configured to select a multiplicity of samples of the OFDM signal in accordance with the window function, where the multiplicity of samples are time aligned with a Fast Fourier Transform window associated with an OFDM demodulator.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: March 9, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: James W. McCoy
  • Patent number: 7675983
    Abstract: A baseband receiver and corresponding methods are arranged and configured to mitigate effects of direct current (DC) distortion and process an Orthogonal Frequency Division Multiplexing (OFDM) signal as provided from a direct conversion radio or receiver. The baseband receiver includes an OFDM demodulator configured to demodulate the OFDM signal, a post processor coupled to the OFDM demodulator and configured to provide symbols corresponding to the OFDM signal, and a compensator coupled to at least one of the OFDM demodulator and the post processor and configured to reduce error rates out of the baseband receiver that result from DC distortion in the direct conversion radio.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: March 9, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Robert M. Gorday, Mahibur Rahman
  • Patent number: 7667492
    Abstract: Methods and corresponding systems for buffering an input signal include outputting a first logic value in response to the input signal being below a lower threshold. A second logic value is output in response to the input signal rising above the lower threshold. Thereafter, the second logic value is maintained until the input exceeds a higher threshold and thereafter falls below the higher threshold. In response to the input signal falling below the higher threshold, the first logic value is output, and maintained at the first logic value, until the input falls below the lower threshold and thereafter rises above the lower threshold.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: February 23, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kiyoshi Kase, May Len, Dzung T. Tran
  • Patent number: 7653413
    Abstract: A portable subscriber device that is arranged and constructed to augment and facilitate interfaces to the device includes a wireless local area transceiver; an internal user interface; and a controller coupled to the internal user interface and the wireless local area transceiver. These elements are cooperatively operable for executing the method including: detecting an external device that is capable of providing an interface to the portable subscriber device; determining whether the external device is available as an interface to the portable subscriber device; and when available as an interface, establishing a wireless link between the portable subscriber device and the external device that will support the interface.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: January 26, 2010
    Assignee: Motorola, Inc.
    Inventor: Michael Kotzin
  • Patent number: 7639671
    Abstract: Methods and corresponding systems for allocating processing resources for a number of instances (N) of a software component include determining an average processing cost (?) and a variance (?2) for the software component. Then a processing cost for the software component is estimated as a function of N, the average processing cost (?), and the variance (?2), and processing resources are allocated in response to the estimated processing cost. The software component can be partitioned into a number of blocks (L), wherein the L blocks include a required block and one or more optional blocks. In some embodiments in response to a total estimated processing cost exceeding an available processing value, selected optional blocks can be disabled to reduce the total estimated processing cost to a value equal to or less than the available processing value. The optional blocks can be prioritized and disabled in order of priority.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: December 29, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Brad L. Zwernemann, Roman A. Dyba, Perry P. He, Lucio F. C. Pessoa
  • Patent number: 7627030
    Abstract: A controllable equalizer is arranged to be automatically and selectively disabled and is configured to operate in a frequency modulated (FM) radio receiver. The controllable equalizer includes an equalizer (115) that is configured to perform an equalization algorithm, e.g., CMA, that relies on a predetermined distribution for a received signal, where the received signal is available from the FM radio receiver and a spurious signal detector (123) that is configured to determine whether a spurious signal is present in the received signal and to disable the equalizer when the spurious signal is present.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: December 1, 2009
    Assignee: Freescale Semiconductors, Inc.
    Inventors: Jie Su, Yong Wang
  • Patent number: 7620380
    Abstract: A method for adjusting automatic gain control (AGC) of a radio receiver begins when a primary AGC module establishes an AGC setting for the radio receiver to produce a primary AGC setting. The method continues when a supervisory AGC module compares performance of the radio receiver utilizing the primary AGC setting with a plurality of performance thresholds. The method continues with the supervisory AGC module adjusting the primary AGC setting to produce adjusted AGC setting when the performance of the radio receiver utilizing the primary AGC setting compares unfavorable with a first performance threshold of the plurality of performance thresholds. The method continues with the supervisory AGC module overwriting the primary AGC setting with alternative AGC setting when the performance of the radio receiver utilizing the primary AGC setting compares unfavorable with a second performance threshold of the plurality of performance thresholds.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: November 17, 2009
    Inventors: Jon David Hendrix, Michael R. May