Abstract: Timing jitter in the clock recovery loop of a `blind` signal acquisition receiver employing a square law detector in a phase lock loop signal flow path is substantially reduced by adaptively adjusting the parameters of the loop's pre-filter, so as to compensate for conjugate antisymmetric components in the spectrum of the monitored signal of interest. The signal timing recovery signal processing mechanism includes a filter parameter adjustment operator which controllably sets the weighting parameters of a baseband prefilter, so that the filtered signal does not possess conjugate antisymmetry about the Nyquist frequency and the spectrum of the filtered signal is essentially conjugate symmetric.

Abstract: To generate the adhesive distribution pattern of a multi-port layout, a die attach machine is fitted with a single port adhesive dispensing head, and is cycled off-line through a sequence of step and repeat movements in accordance with a given programmed geometry control pattern, so as to sequentially generate a multi-dot adhesive pattern. After refining, as necessary, the geometry and coordinate positions of the respective adhesive dots of the desired pattern, a multi-port dispenser is formed in which the coordinates of the dispensing tubes or nozzles of the tubes of the dispensing head coincide with those of the sequential step and repeat, pick and place pattern used to cycle the single port dispensing head. The adhesive dispensing head also incorporates one or more standoffs, to ensure uniform application of adhesive at each dot location and prevent an unwanted accumulation of adhesive around the distal ends of the dispensing tube ports.

Abstract: The feedforward filter section of a decision feedback equalizer is modified to include one or more postcursor taps, that are sequentially weighted at decreasing binary fractions of the cursor tap. Such a modified feedforward filter section, combined with the placement of a simple anti-aliasing filter upstream of the sampling point, results in an optimum feedforward filter configuration that is not anticausal, and offers a substantially improved performance over conventional DFB equalizer structures. Optimum performance is achieved when such a postcursor filter structure is augmented with an adaptive noise canceler coupled in the DFB path.

Abstract: The need to employ costly precision components to reduce non-linearities in the signal processing path of noise reduction circuitry such as an echo canceler and decision feedback equalizer is successfully addressed by a transversal filter which is capable of effectively tracking for non-linearities in system components that manifest themselves as added noise introduced into the signal propagation path. This non-linear tracking capability is attained by employing cascaded sets of weighting coefficient and scaling factor multiplying stages. The first set of weighting coefficients effectively modifies the contents of each of the transmitted symbol samples in the transversal filter delay line to produce respective sets of `partial sums` associated with the respective data symbols employed in the data modulation scheme. The second, cascaded set of `scaling` coefficients or factors is employed to scale selected ones of the sets of the partial sums.

Abstract: A silicon layer formed atop a sapphire substrate is selectively recrystallized such that the original degraded quality of the crystallinity of an N-well region where a P-channel device is to be formed is enhanced, so that leakage in the P-channel device is reduced, while the high ultraviolet reflectance number of a P-well region where an N-channel device resides remains unaffected. The process according to the present invention involves implanting silicon into only that portion of the silicon layer where an N-conductivity well region for a P-channel device is to be formed. An N-conductivity type impurity is introduced into the silicon-implanted portion of the silicon layer, to form the N-conductivity well region. The structure is then annealed at a relatively low temperature for several minutes, which is sufficient to activate the phosphorus and to cause local recrystallization of the N-well region of the silicon layer, without essentially causing a redistribution of the phosphorus.

Abstract: To remotely interrogate a telecommunications services channel unit resident in any office along a tandem network communication link, a control link establishment code sequence comprised of one or more sets of predefined digital code bytes is transmitted from a test system controller. The format of the control link establishment sequence is such that as it is forwarded down the link, any tandem channel unit or units that are intermediate the test system controller and the destination channel unit will transition to a transparent state, so that only the destination channel unit will be able transition to an interrogation, response mode. During the command-response mode, channel units connected in tandem between the selected channel unit and the interrogating test system controller continue to assume a transparent state, so that command and response messages propagate unmodified through such intermediate channel units.

Abstract: A method for drawing lines on a graphics device in such manner in that only those points lying inside a specified rectangular area of the device are drawn. Predetermined digital outcodes are generated for defining the endpoints of the lines and a decision is made whether to draw or not draw the lines based on the relationship of the endpoints with respect to both the specified rectangular area of the device, and a second larger rectangular area of the device.

Abstract: An electronic key and lock system, particularly useful for solenoid-operated locks employs a key that can operate electronically and mechanically. The key is mechanically polarized with its blade forming a first electrical contact and a separate second contact which is flush or raised relative to the blade. Each of the key and the cylinder employs respective light emitting and light receiving IR devices for communications between the electronics in the key and communications within the lock. The lock includes a solenoid-operated electronic cylinder.

Abstract: A digital tandem channel unit installable in an intermediate central office of a digital carrier telephone network maintains the digital format of the T1 traffic in the course of a DS0 tandem cross-connect, so as to eliminates the possibility of corruption of voice/data traffic, as may occur in a conventional `analog` office cross-connect tandem pair due to quantization errors introduced into the data stream in the course of the digital to analog conversion of the data. Also, the invention incorporates control software in each tandem channel unit's micro-controller that allows it to respond to analog tone signalling test procedures initiated from either two or four-wire channel ports of network access equipment.

Abstract: First and second resistors are connected in series with a Zener diode between first and second points of operating potential. The base-to-emitter of an NPN transistor is connected across the first resistor to sense the current through the series path. The collector-to-emitter of a PNP transistor is connected across the second transistor, whereby when the PNP transistor is turned-on hard and into saturation, the voltage drop across the second transistor decreases. The collector of the NPN transistor is connected to the base of the PNP transistor, whereby when an overvoltage condition exists and the Zener diode breaks down, the two transistors are driven regeneratively and form a latch and the operating point of the circuit is shifted.

Abstract: A coordinate transformation method and apparatus that uses a lookup table to store a sample of transformed output values and an interpolator for interpolating between samples of the output values to provide an output data value. The samples are stored at varying sample spacings to accommodate varying curvatures of the transformation function so as to minimize interpolation errors.

Abstract: Analog (LC) circuit components for an input matching and base charge removal network for a Class-C amplifier are replaced by a digitally driven shunt circuit, which is coupled between the base electrode of the Class-C power transistor and a reference voltage terminal (ground). The digitally driven shunt circuit is operative to couple the base electrode of the power transistor to the reference voltage terminal upon the termination of the limited duty cycle input pulse employed as the base drive to the power amplifier. To facilitate implementation as a digital application specific integrated circuit (ASIC), the controlled shunt circuit comprises an auxiliary or second bipolar transistor having its emitter-collector path coupled in circuit with the base of the bipolar power transistor and the reference voltage terminal.

Abstract: A radon gas detector comprises a housing having an air inlet port leading to an interior, a radiation detection (e.g. alpha particle measurement) chamber and an air exhaust port leading from the interior chamber to the exterior of the housing. The chamber is closed to the entry of ambient light by a pair of light-obstructing baffles that respectively couple the air inlet and air exhaust ports to the interior chamber. Coupled with the air inlet port is a first removable, electrically conductive mesh filter. Coupled with the air exhaust port is a second, fixed electrically conductive mesh filter. Since each mesh filter is electrically conductive, it readily traps radon daughter products before they can enter into the interior chamber. Also, because of its mesh configuration, each filter readily permits substantial air flow. To measure radon concentration in the air being circulated through detector, a radiation (e.g.

Abstract: The problem of a visible, rim-mounted valve stem for inflating a customized wheel-mounted tire is obviated by a wheel configuration that translates the tire inflation location from a valve stem mounted on the wheel rim to a hub location where a readily accessible tire inflation port can be effectively hidden beneath a locking center cap, making the access port tamperproof. A tire inflation passageway is integral with a spoke that connects the wheel hub to the wheel rim. In a preferred embodiment the wheel is a unitary cast structure, with the tire inflation passageway integrally cast as part of one of the spokes. The hub portion of the wheel has an inflation access port in fluid communication with the tire inflation fluid passageway, thereby providing for the application of pressurized air to the fluid passageway, so that inflation air flowing therethrough may be supplied to the interior of a tire mounted on the wheel rim and thereby control the tire pressure of the tire.

Abstract: A transient voltage surge suppressor comprises a first series circuit formed of a normally-off voltage surge-responsive gas discharge tube and a first voltage clamping device connected across input terminals to which a line voltage is applied. It also includes a second series circuit formed of a first electrical energy absorbing impedance element and a second voltage clamping device connected across the first voltage clamping element, thereby forming a voltage-clamping, voltage divider circuit which clamps the voltage across the first voltage clamping element at a voltage level reduced in comparison with that obtained by the first series circuit alone. When the gas discharge tube turns on, it places both voltage clamping devices in the circuit simultaneously, so that the let-through voltage appearing across output terminals can be reduced to the voltage clamped by the voltage-clamping, voltage divider circuit.

Abstract: A single event upset immune latch circuit comprises a first latch having first and second complementary channel inverters respective input nodes and output nodes of which are cross-coupled to one another. First second pairs of (complementary channel) decoupling transistors respectively couple the output nodes of said first and second complementary channel inverters in circuit with first and second voltage supply terminals. (Cross-)coupled with the first latch is a second latch having third and fourth complementary channel inverters, respective input nodes and output nodes of which are cross-coupled to one another. Third and fourth pairs of (complementary channel) decoupling transistors respectively couple the third and fourth complementary channel inverters in circuit with the first and second voltage supply terminals.