Patents Represented by Attorney, Agent or Law Firm Chris A. Caseiro
  • Patent number: 6701807
    Abstract: A socket device with an off-center slot for loosening and tightening connectors positioned in confined locations. The socket includes a socket body, a slot to allow a tube or pipe to pass there through and a nut retaining region. The nut retaining region positioned adjacent to a first face of the socket has a centerline that is offset from the centerline of the socket body. A socket driver port located in the opposing second face of the socket has a centerline that is offset from the centerline of the socket body but remains within the dimensions of the socket body. That arrangement allows socket rotation within a confined area with maximum possible mechanical advantage. The socket may have different receiving region configurations to accommodate different nut connector designs.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: March 9, 2004
    Inventor: Barry Gammon
  • Patent number: 6703447
    Abstract: A polymeric film and method for making the film. Mixing a structural material with a secondary material to form a unitary mixture prior to processing forms the film. For a printable film, the secondary material is a printable material. The unitary mixture is extruded and heated so as to cause the printable material to bloom to the surface of the mixture. The result is a film that is stiffer and that lays flatter than prior multi-layered films that were prone to curling. The rollers used to stretch the film during this heat-setting stage are preferably very smooth so as to enhance the transverse-direction strength and stiffness of the film. In another embodiment of the invention, the secondary material is a clarity-enhancing material that may be styrene-ethylene-butadiene-styrene block copolymer. The blend combination is a suitable replacement for polyvinyl chloride films in that it is soft, conformable, flexible and clear.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: March 9, 2004
    Inventor: Theodore R. Coburn
  • Patent number: 6602101
    Abstract: A loop bottom buoy stick having a primary upper section and a primary lower section configured to receive a connector in an eyelet at the distal end of the primary lower section. The lower section includes a fixed section and a flap section adjacent to the fixed section. The fixed section is a continuation of the primary upper section and the flap section in combination with the fixed section forms the eyelet. The flap section is arranged to be able to be drawn away from the fixed section to establish a spacing through which the connector can easily pass. Optional spacer inserts may be used to set the positioning of a buoy on the stick.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: August 5, 2003
    Inventor: Eric deDoes
  • Patent number: 6525266
    Abstract: An Electromagnetic Interference (EMI) shielding system including a conductive clip for electrically coupling a printed circuit board (PCB) to a grounding structure. The clip includes a first contact section attached to a side rather than an edge of the PCB, and a second contact section for contacting the grounding structure. The clip is compressible to ensure a tight fit of the second contact section to the grounding structure. The clip may be formed as a unitary structure and includes transition regions between the first and second contact sections that provide flexibility to the structure. Edge flaps may optionally be included to enhance surface contact of the clip to the PCB. The second contact region is preferably designed with a flat top surface to enable automated surface mounting.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: February 25, 2003
    Assignee: Enterasys Networks, Inc.
    Inventors: William M. Ferland, Martin Q. Thornton, Edward J. Wilson, John M. Devine
  • Patent number: 6341767
    Abstract: A spring system includes an axially moving center attachment located between two static attachments. Bi-directional axial center deflections cause push-pull restoration forces. There is little mechanical fixturing preload stress acting on material also subjected to high cyclic stresses. The spring material includes an unbroken path between the two static attachments, going through the center attachment. In one embodiment, the unbroken path is a length of wire bent into substantially parallel side-by-side helices clamped statically at the bottom of each helix. A moving attachment grips the center of the wire bridging diagonally between the tops of the helices. In a second embodiment, the unbroken path is a length of wire bent into end-to-end helices sharing a common axis and clamped statically at the axially opposite ends of the spring.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: January 29, 2002
    Inventors: Joseph B. Seale, Gary E. Bergstrom
  • Patent number: 6321158
    Abstract: An Integrated Routing/Mapping Information System (IRMIS) links desktop personal computer cartographic applications to one or more handheld organizer, personal digital assistant (PDA) or “palmtop” devices. Such devices may be optionally equipped with, or connected to, portable Global Positioning System (GPS) or equivalent position sensing device. Desktop application facilitates user selection of areas, starts, stops, destinations, maps and/or point and/or route information. It optionally includes supplemental online information, preferably for transfer to the PDA or equivalent device. Users' options include route information, area, and route maps. Maps and related route information are configured with differential detail and levels of magnitude. Used in the field, in conjunction with GPS receiver, the PDA device is configured to display directions, text and map formats, the user's current position, heading, speed, elevation, and so forth.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: November 20, 2001
    Assignee: DeLorme Publishing Company
    Inventors: David M. DeLorme, Keith A. Gray, Gordon Autry, Keith A. Moulton
  • Patent number: 6300733
    Abstract: A system for measuring and controlling solenoid armature position. The system determines inductive voltage in the drive winding of the solenoid, integrates that voltage to obtain flux, and uses the current/flux ratio to measure armature position. To overcome integration drift, the current/flux position measure is compared to an independent position measure, this comparison leading to a drift correction. In an embodiment maintaining a servo-controlled position, flux drift causes position drift and current drift, the latter providing an independent measure of position drift and flux drift, permitting drift correction. In a second embodiment, a high frequency component of the drive voltage (possibly from pulse width modulation) and a high frequency current measurement provide the independent measure of position.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: October 9, 2001
    Inventor: Gary E. Bergstrom
  • Patent number: 6283284
    Abstract: A case for retaining disks therein. The case is preferably a two-piece structure formed of a lid and a base detachably coupled together. The base is formed to include a disk retainer that is rotatable with respect to the base. The retainer is coupled to a wall of the base using a living hinge that permits rotation of the retainer well away from the interior surface of the base. The retainer includes a modified hub for capturing the disk. The modified hub has a tongue-and-capturing-structure combination permitting easy application of the disk to the hub and removal therefrom with little stress on the disk. The lid is coupled to the base using a pair of rotatable cams that allow the lid to be rotatable well away from the base. The two-piece structure with the rotatable disk retainer and lid make the case of the present invention compatible with an array of automated disk packaging processes and equipment.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: September 4, 2001
    Assignee: Shape Global Technology
    Inventors: Robert Crane, Craig Lovecky
  • Patent number: 6261932
    Abstract: A method of forming an improved Schottky diode structure as part of an integrated circuit fabrication process that includes the introduction of a selectable concentration of dopant into the surface of an epitaxial layer so as to form a barrier-modifying surface dopant layer. The epitaxial layer forms the cathode of the Schottky diode and a metal-silicide layer on the surface of the epitaxial layer forms the diode junction. The surface dopant layer positioned between the cathode and the diode junction is designed to raise or lower the barrier height between those two regions either to reduce the threshold turn-on potential of the diode, or to reduce the reverse leakage current of the transistor. The particular dopant conductivity used to form the surface dopant layer is dependent upon the conductivity of the epitaxial layer and the type of metal used to form the metal-silicide junction.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: July 17, 2001
    Assignee: Fairchild Semiconductor Corp.
    Inventor: Ronald Hulfachor
  • Patent number: 6259303
    Abstract: A wave shaping circuit for shaping the transition edges of switching electrical signals. The wave shaping circuit controls voltage output as a function of time and is applicable in digital and analog systems. The shaping circuit includes one or more stages having the capability to conduct current simultaneous during signal transitions. Each simultaneous conduction current stage is coupled to a current mirror circuit powered by a power supply rail. The current mirror circuit is coupled to a capacitive element that is charged or discharged by current provided through the simultaneous conduction current stage or stages. Through selectable design of the simultaneous conduction stages, the current mirror circuit, and the capacitive element, the designer can tailor the shape of the transition curve as the input signal is propagated through the shaping circuit to the output.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: July 10, 2001
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Trenor F. Goodell
  • Patent number: 6252432
    Abstract: A CMOS-based circuit for translating a differential-input into a single-ended output capable of driving large loads with little or no compromise in speed. This translator provides a symmetric single-ended output signal capable of driving a wide range of loads with minimal distortion. In contrast to earlier such translators, the circuit of the present invention ensures that the output signal is coupled directly to the high-voltage rail after being switched to logic HIGH and that that coupling remains in effect until an input signal causing the output to switch to logic LOW is received. Similarly, when the output signal is switched to logic LOW, it is coupled directly to the low-voltage rail of the circuit and left so coupled until it is affirmatively switched to logic HIGH. This feature ensures that regardless of load, the output signal completely switches to the proper logic stage.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: June 26, 2001
    Assignee: Fairchild Semiconductor Corp.
    Inventor: Oscar W. Freitas
  • Patent number: 6249148
    Abstract: A variable base drive output circuit that is operational for low-potential power supplies. The output circuit includes a current regulating branch and a base drive branch. A control transistor is logically coupled to an enable signal and an input signal to be propagated. Activation of that control transistor establishes a current path to the base of a bipolar pulldown transistor that is coupled to output. The current regulating branch includes a resistance device in series with current limiting transistors. The resistance device is coupled to the control node of a base current transistor such that when the load on the output node drops, the current to the base of the pulldown transistor also drops. The result is a savings in Icc current for logic LOW signals at the output node. The variable base drive output circuit is operable for low supply potentials.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: June 19, 2001
    Assignee: Fairchild Semiconductor Corporation
    Inventor: David P. Morrill
  • Patent number: 6249418
    Abstract: A system for controlling the force and/or motion of an electromagnetic actuator. The actuator could be a solenoid, relay, or levitating device. The drive to the coil can be linear or switching, voltage or current and the sensors measuring the system can be as simple as just a current sensor monitoring the coil current or a flux sensor. Continuous control of position can be achieved allowing magnetic levitation or the soft landing of the moving element.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: June 19, 2001
    Inventor: Gary Bergstrom
  • Patent number: 6241641
    Abstract: An exercise device and business method for employing an existing plastic container as the exercise device. The exercise device is an existing plastic container originally used as a container for a conventional consumer product. Upon depletion of the original contents, the container is to be used as an exercise device by filling it with a suitable benign filler to a level of interest in order to establish a desired weight of the container. The container must be one that includes a handle designed for balanced holding thereof. The associated business method involves the application to the container of instructions for the new use of the container as an exercise device and the associated environmental and health benefits related to recycling of the container as the exercise device. Optional demarcation lines may be applied to the container to define specific weight levels as a function of the filler employed.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: June 5, 2001
    Inventor: Jonathan Sawyer
  • Patent number: 6240799
    Abstract: A system and related method to enable six-axis movement of a structure. The system is related to hexapods, Stewart platforms and other mechanical movement systems. It includes a plurality of moveable supportive legs coupled to a platform. For the Stewart platform version of the system, there are six supportive legs, each of which connects to a triangular platform that acts as a base.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: June 5, 2001
    Assignee: Hexel Corporation
    Inventor: Chi Lam Yau
  • Patent number: 6236259
    Abstract: A bus switch for transferring logic signals between nodes without the problems associated with undershoot conduction. The bus switch is an FET switch including a single primary transfer transistor. The bulk of the transfer transistor is coupled to a differential logic sense circuit that is designed to establish a pseudo low-potential power rail. The logic sense circuit is coupled to the two transfer nodes and a standard low-potential power rail. It compares the potentials associated with the transfer node signals and the low-potential rail and selects the one with the lowest potential to establish the potential of the pseudo low-potential rail. The logic sense circuit provides for active selection of the lowest potential element, including under very small undershoot conditions.
    Type: Grant
    Filed: October 4, 1999
    Date of Patent: May 22, 2001
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Trenor F. Goodell, Myron J. Miske
  • Patent number: 6229163
    Abstract: A method for utilizing fractal analysis in the design and manufacture of semiconductor structures including transistor devices such as power MOS devices. The method includes using fractal theory to determine optimum source perimeter values to increase aspect ratio. The method is implemented to allow for use of the theoretical values in conjunction with known photolithographic fabrication techniques. The resultant structure thus incorporates the theoretically derived values to approximate a fractal structure.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: May 8, 2001
    Assignee: Fairchild Semiconductor Corp.
    Inventor: Daniel S. Calafut
  • Patent number: 6215342
    Abstract: A power-on reset circuit for a dual-supply system. The reset circuit includes a voltage divider powered by the first power supply and a sub-circuit supplied by the second power supply. The output of the voltage divider is connected to a control node of the first reset sub-circuit that is otherwise powered by the second power supply. A second reset sub-circuit is strictly regulated and powered by the second power supply. The first reset sub-circuit provides for translation of a signal having a potential limited by the potential of the first supply into a signal having a potential associated with that of the second supply. Only when a control signal from the voltage divider reaches a certain potential, and the second power supply reaches a certain potential, is the first reset sub-circuit activated in a manner that results in a circuit output signaling both supplies are at a suitable potential. This is useful for hot insertion applications in dual-supply systems.
    Type: Grant
    Filed: July 14, 1999
    Date of Patent: April 10, 2001
    Assignee: Fairchild Semiconductor Corporation
    Inventor: David P. Morrill
  • Patent number: 6198308
    Abstract: A buffer circuit for providing dynamic threshold control. The buffer circuit includes a pair of input inverters designed with different skewed threshold potential characteristics. The outputs of the skewed inverters are directed to a logic circuit designed to select either the faster or the slower signal received from the two inverters for transmission to passgate devices coupled to the respective inverters. Only one of the passgate devices is enabled to ensure that only one of the output signals from the two inverters is propagated through the buffer. A latch is preferably connected between the logic circuit and the two passgate devices to maintain the states of the inverters and the logic circuit. The circuit can be designed to define the threshold potential at which switching will occur so as to reduce propagation delay or increase it as desired. It is therefore possible using the circuit to increase transmission rates with minimal affect on signal noise.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: March 6, 2001
    Assignee: Fairchild Semiconductor Corp.
    Inventor: David P. Morrill
  • Patent number: D441914
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: May 8, 2001
    Inventor: Dawn Armour