Patents Represented by Attorney Chris Hersch
  • Patent number: 5586279
    Abstract: A cached processor (2) comprises a cache memory (8') having mode switching means for selecting an address capture mode whereby information, such as data and/or instructions, can be captured and stored in all or part of a cache array (30) of the cache memory in real time. The captured information can at any time be transferred to, and used by, an external debug station, coupled to the cached processor, to observe the executed program flow.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: December 17, 1996
    Assignee: Motorola Inc.
    Inventors: Ilan Pardo, Yair Libman