Patents Represented by Attorney Christopher J. Byrne
  • Patent number: 5003248
    Abstract: Disclosed is a probability density histogram display for a digital oscilloscope which shows a probability density histogram display of an input signal waveform alongside the conventional voltage-versus-time time-domain display of the waveform. The histogram shows the relative frequency of occurrence of voltage amplitude levels of the waveform. The histogram is optional and shown simultaneously with the time-domain display of the waveform.
    Type: Grant
    Filed: June 15, 1990
    Date of Patent: March 26, 1991
    Assignee: Hewlett-Packard Company
    Inventor: Dana L. Johnson
  • Patent number: 5001418
    Abstract: Disclosed is a method for compressing sequences of data-vectors, which sequences are to be used for testing circuit boards with the aid of a circuit board testing machine. The method involves an initial compression of the data-vector sequence followed by a so-called K-T transformation of the remaining data-vectors. The initial compression involves eliminating redundant data-vectors from the initial sequence and retaining only the unique data-vectors together with sequencing information indicating where in the initial sequence each unique-data vector occurred. The K-T transformation involves a bitwise logical exclusive-OR operation (XOR) whereby the remaining data-vector sequence is K-T transformed thereby further compressing the sequence without losing any of the original sequence information.
    Type: Grant
    Filed: December 6, 1989
    Date of Patent: March 19, 1991
    Inventors: Kenneth E. Posse, Kevin W. Keirn, Michael A. Lassner, George L. Booth
  • Patent number: 4977514
    Abstract: Provided is a an overlaid digital signal waveform display for a logic analyzer. The present invention allows the logic analyzer user to overlay, that is superimpose, individual digital waveforms within a functional group of waveforms onto each other so that all the waveform transitions within the group appear at one level across the display screen of the logic analyzer. Thus, all waveforms within a functional group, such as all the address line waveforms of an address bus, can be overlaid onto each other. In addition, individual waveforms within the group can be shown isolated from the overlaid group.
    Type: Grant
    Filed: September 8, 1989
    Date of Patent: December 11, 1990
    Assignee: Hewlett Packard Company
    Inventor: Kevin M. Bush
  • Patent number: 4972138
    Abstract: Provided is an oscilloscope-like user-interface for a logic analyzer. The oscilloscope-like user-interface simplifies user control of the logic analyzer. The oscilloscope-like user-interface substitutes two oscilloscope-like controls (seconds-per-division and delay) for six logic analyzer controls (sample-period, magnification, magnify-about, magnify-about marker-movement, start/center/end, and delay-from-trigger). The result of the substitution is a logic analyzer which is operable with oscilloscope-like controls and which does not require user understanding of the logic analyzer's sampling hardware for effective user operation.
    Type: Grant
    Filed: December 12, 1989
    Date of Patent: November 20, 1990
    Assignee: Hewlett Packard Co.
    Inventor: Kevin M. Bush
  • Patent number: 4967412
    Abstract: Disclosed is a serial frame generator which generates serial data which conforms to a user-selected telecommunication protocol. The serial frame generator can be used with a circuit board tester to create test vectors for telecommunications circuits which require serial data input. The serial frame generator is user-adaptable so that serial frame data can be produced for essentially any kind of serial frame protocol.
    Type: Grant
    Filed: April 8, 1988
    Date of Patent: October 30, 1990
    Assignee: Hewlett-Packard Company
    Inventors: Christopher B. Cain, Robert E. McAuliffe, Lynn A. Schmidt, Elaine L. May, John E. Siefers
  • Patent number: 4939673
    Abstract: A method and apparatus for enhanced line endpoint positioning in an analog vector display, for use in high resolution color film recording and other high resolution imaging processes associated with computer generated graphics.
    Type: Grant
    Filed: June 7, 1989
    Date of Patent: July 3, 1990
    Assignee: Hewlett-Packard Company
    Inventors: Paul R. Hanau, M. David Blythe
  • Patent number: 4914659
    Abstract: Disclosed is a software development tool for testing software on embedded microprocessor-based systems. A microprocessor emulator is used to provide the embedded system with access to external mass storage and other systems. The software development tool includes a software branch analyzer which is used to report whether branches in software under test were executed.
    Type: Grant
    Filed: February 10, 1988
    Date of Patent: April 3, 1990
    Assignee: Hewlett-Packard Company
    Inventor: Bruce A. Erickson
  • Patent number: 4887260
    Abstract: Provided is a channel status display for an X.25 wide area network (WAN) DTE-DCE interface. The invention, designed for use with a protocol analyzer, monitors X.25 level-2 frame traffic on the DTE-DCE link and produces a dynamic channel-activity-data-structure based upon the level-2 frames. An important class of level-2 frames are so-called I-frames. I-frames contain a 12-bit LCI (Logic Channel Identifier) field. The LCI number identifies up to 4095 channels over which network calls may be transmitted and received at the DTE-DCE interface. The LCI field of an I-frame is used to index an array of pointers. The pointers point to list members in a linked list of call-records. A call-record is a complete listing of call information for a given channel. The array of pointers and the linked list of call-records together make up the channel-activity-data-structure. The data-structure is updated with each new I-frame.
    Type: Grant
    Filed: February 17, 1987
    Date of Patent: December 12, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Matthew J. Carden, Kim Lantz, Theresa L. Reh, Anne Trytten, Yves Lubino
  • Patent number: 4825449
    Abstract: Provided is an apparatus for analysing radio transmission to indicate the condition of a transmission link. The apparatus samples received digital radio signals to produce at each sampling instant a signal or signals representative of the modulation state at that instant. The apparatus includes display means for displaying a given number of the samples as an array of clusters in which each cluster corresponds to one of the modulation states. Associated with the display is a graticule generating means capable of storing data indicative of a plurality of graticule configurations. The apparatus has means which enables the production on the display of a graticule configuration which is appropriate to the cluster array associated with the modulation scheme of the transmission under analysis. In addition there is an adjustment which can be operated to set the relative position of the array and the graticule.
    Type: Grant
    Filed: March 17, 1987
    Date of Patent: April 25, 1989
    Assignee: Hewlett-Packard Limited
    Inventor: Murdo J. McKissock
  • Patent number: 4823077
    Abstract: Disclosed is a circuit for maintaining a constant effective hysteresis at the input to a trigger comparator of an oscilloscope for the purpose of preventing double triggering due to false triggers. A microprocessor tracks the trigger amplifier gain control inversely relative to the vertical vernier amplifier gain control via digital-to-analog converters at the input to each gain control. Such tracking serves to adjust the trigger signal inversely relative to the on-screen signal such that a constant hystersis is maintained.
    Type: Grant
    Filed: November 14, 1988
    Date of Patent: April 18, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Robert M. Landgraf, Johnie L. Hancock
  • Patent number: 4775973
    Abstract: Disclosed is a communications measurement matrix display for a protocol analyzer which is used to monitor traffic on a packet-switched network. The display allows the protocol analyser user to see, at a glance, a complete and accurate overview of communications between more than thirty-one nodes on a packet-switched network, over a user selectable range of measurement-time intervals. The matrix display has two modes. One mode shows the source versus the destination nodes of the network as a 32-.times.-32 two-dimensional X-Y grid matrix having thirty one source nodes ordinally indicated along one grid axis and thirty one destination nodes ordinally indicated along the other grid axis. The thirty second ordinal position on each axis designates any nodes other than the first thirty one nodes. A display marker postioned on the grid indicates communication between the source node and the destination node which correspond to the (X,Y), that is, the (SOURCE, DESTINATION), coordinates of the marker.
    Type: Grant
    Filed: October 22, 1986
    Date of Patent: October 4, 1988
    Assignee: Hewlett-Packard Company
    Inventors: Jeffrey Tomberlin, Justin S. Morrill, Jr., James P. Quan
  • Patent number: 4754420
    Abstract: An apparatus for digital filtering of sequences of data units, such as sequences of bytes. The apparatus uses parallel application of more than one filter and stores the results of applying all filters to a whole sequence of data units. The apparatus involves the interaction of random access memories. Hence, filters are programmable. In addition, individual data units in a sequence may be trapped for comparison solely as a function of their ordinal position in the sequence.
    Type: Grant
    Filed: November 14, 1985
    Date of Patent: June 28, 1988
    Assignee: Hewlett-Packard Company
    Inventor: Gordon A. Jensen
  • Patent number: 4719416
    Abstract: Disclosed is a method for determining and executing the minimum number of sample acquisition-sweeps necessary to meet the risetime specifications of a digital oscilloscope which uses random repetitive sampling. The method of the present invention selects from two criteria to determine the required number of acquisition sweeps. At narrow time ranges a risetime criterion is used. At wider time ranges a percentage-filled criterion is used. The choice between criteria depends upon the user-selected time range setting. The time range setting directly affects the time-width of each one of a fixed number of time-buckets. A time-bucket is a discrete unit of time which varies directly with the time-width of the user-selected time range. The number of time-buckets is fixed. Time-buckets can be manifested either on the oscilloscope display screen or in the oscilloscope's memory.
    Type: Grant
    Filed: November 10, 1986
    Date of Patent: January 12, 1988
    Assignee: Hewlett Packard Company
    Inventor: Patricia A. Desautels
  • Patent number: 4680755
    Abstract: Provided is a circuit for signalling the real-time end of a local area network packet as the packet is being pulled off a transmission medium and stored in memory. Storage of the packet is performed by a local area network coprocessor. The circuit monitors for the simultaneous occurrence of three conditions: the coprocessor is in a write-to-memory cycle; it is writing to the address of a status word pertaining to a packet; and the most significant bit of the status word is being set. If all three conditions are true, the circuit asserts the real-time end-of-packet signal.
    Type: Grant
    Filed: November 14, 1985
    Date of Patent: July 14, 1987
    Assignee: Hewlett Packard Company
    Inventor: Stephen P. Reames
  • Patent number: 4679193
    Abstract: Provided is a circuit for preventing local area network packets shorter than a predetermined bit length from being received by a local area network coprocessor. Serial data which would otherwise be received by the coprocessor is delayed by a data-shift register of predetermined bit length. Simultaneously, a carrier-sense-signal, which alerts the coprocessor that serial data is ready to be received, is modified by a carrier-sense-signal regeneration circuit. If the carrier-sense-signal is detected true by the regeneration circuit for a number of clock cycles equal to the number of bits in the data-shift register, then the carrier-sense-signal is delivered to the coprocessor and the data in the data-shift register is received by the coprocessor. Once the carrier-sense signal goes false, the regeneration circuit continues to deliver the carrier-sense-signal until the data-shift register empties.
    Type: Grant
    Filed: November 14, 1985
    Date of Patent: July 7, 1987
    Assignee: Hewlett Packard Company
    Inventors: Gordon A. Jensen, Stephen P. Reames, Jerry D. Morris, Scott S. Neal
  • Patent number: D320684
    Type: Grant
    Filed: August 2, 1988
    Date of Patent: October 8, 1991
    Assignee: Hewlett-Packard Co.
    Inventors: James E. Berry, Ronald K. Kerschner, Lisa M. Kent
  • Patent number: D338416
    Type: Grant
    Filed: July 25, 1988
    Date of Patent: August 17, 1993
    Assignee: Hewlett-Packard Company
    Inventors: James E. Berry, Brent W. Thordarson, Michael L. Christensen