Abstract: A bonding tool for bonding a wire to a substrate. The bonding tool has a cylindrical body portion formed from a first material and a conical tip portion separately formed from a second material. The conical tip portion is coupled to one end of the body portion.

Abstract: The present invention is a method and apparatus for forming a bump for semiconductor interconnect applications, such as reverse wire bonding or stud bumping for flip chip interconnections. The bump is formed by (1) ball bonding at the bump site, (2) raising the capillary a predetermined height after forming the ball bond with the wire paying out of the capillary tip, (3) moving the capillary laterally a predetermined distance, preferably in a direction toward the site of other end of the wire loop, if the bump is to be used as the platform for a stitch bond of a wire loop, (4) raising the capillary further, and (5) moving the capillary diagonally downwardly and in the opposite direction of the first lateral motion. The wire is then severed by raising the capillary, closing the clamps and raising the capillary again to snap the wire pigtail off at the bump.

Abstract: Electronic packages with uninsulated portions of copper circuits protected with coating layers having thicknesses that are suitable for soldering without fluxing and are sufficiently frangible when being joined to another metal surface to obtain metal-to-metal contact between the surfaces.

Abstract: A method of forming a conductive bump is provided. The method includes depositing a conductive bump on a bonding location using a bonding tool such that a junction exists between (1) a length of wire extending at least partially within the bonding tool and (2) the deposited conductive bump. The method also includes moving the bonding tool to contact the conductive bump such that a location of the junction is moved with respect to the bonding location.

Abstract: A method of packaging a multi-tier wire bonded semiconductor device is provided. The method includes applying an insulative material across only a portion of at least two of a plurality of conductors per layer providing interconnection between elements in the multi-tier wire bonded semiconductor device. The method also includes encapsulating the conductors and elements, thereby packaging the semiconductor device.

Abstract: A method of processing a semiconductor wafer including a plurality of semiconductor dies is provided. The method includes providing a semiconductor wafer including a plurality of semiconductor dies, at least a portion of the semiconductor dies including contact pads for testing the respective semiconductor die. The method also includes positioning conductive bumps on the contact pads prior to completing wafer testing of the semiconductor wafer and prior to the singulation of the plurality of semiconductor dies from the semiconductor wafer. At least a portion of the conductive bumps are configured to be electrical paths during wafer testing of the semiconductor wafer.

Abstract: The present invention is directed to an integrated flexure mount scheme for dynamic isolation of ultrasonic transducers for use with a wire bonding machine. The transducer has a body of a generally elongated shape having front, rear, and main portions. The transducer has mounting flanges for mounting the transducer to the wire bonding machine. The mounting flanges have at least two integrated flexures that connect the mounting flange to the main portion of the transducer body and define at least one flexure orifice.

Abstract: A method for forming an integrated circuit interconnect pad is described. In one embodiment a method of forming an integrated circuit comprises screen printing a conductive paste onto a terminal metalization pad and curing the conductive paste in an inert or reducing atmosphere at an elevated temperature to form an under-bump metalization layer of an interconnect pad. The elevated temperature is below a melting temperature of the terminal metalization pad.