Abstract: In some embodiments, provided is a microstructure assembly having a capture receptacle, a key, and an actuator associated therewith. The capture receptacle is associated with a substrate and includes alignment projections projecting upward from the base of the capture receptacle. The key is associated with a microstructure device and configured to mate in the capture receptacle, the key has alignment receptacles in a bottom surface of the key constructed to mate with the alignment projections. The actuator is adjacent to the key so as to be capable of contacting the key to trap the key against the capture receptacle.

Abstract: In one possible embodiment, a waterproof connector is provided having pins secured to a bendable board. The bendable board and a portion of each of the pins are encased in a compressible material capable of providing a biasing force on the plurality of pins upon mating with a mating surface. The compressible material also provides a deformable sealing surface for mating with the mating surface.

Abstract: In one possible embodiment, a waterproof connector is provided having a unitary compressible housing comprised of a waterproof material encasing a finger board. The finger board is constructed to receive interconnect wires and corresponding electrical contact pins, which are secured to the finger board. The housing has a well portion within the housing, the electrical contact pins extend through the waterproof material from the finger board into the well. Partition portions within the well extend between the electrical contact pins. A sealing lip portion is around the well on a mating side. The housing also has a compressible backing portion behind the finger board. The unitary compressible housing may be constructed to be seated in a structural housing, which may be a recess or the like in a structural member or component of an apparatus.

Abstract: A method for fabricating a tiered structure includes forming a gate on a semiconductor substrate. Formation of the gate includes depositing a gate foot using a gate foot mask having an opening through it to define the gate foot over the substrate. After forming the gate foot, the gate foot mask is stripped and a passivation layer is formed over the gate foot and the substrate. A gate head mask is formed over the gate foot with the gate head mask exposing a portion of the passivation layer on a top portion of the gate foot. The portion of the passivation layer on the top portion of the gate foot is removed to expose the top portion of the gate foot. A gate head is formed on the top portion of the gate foot using the gate head mask. A lift-off process is performed, removing the gate head mask.

Abstract: In one embodiment, a cascaded monolithic crystal filter is provided. A first filter includes two resonators having a pair of electrodes with the monolithic crystal between. At least one electrode has a periphery which includes a feature capable of shifting a frequency associated with an anharmonic mode in the filter. The filter has a second resonator acoustically coupled to the first resonator. A second filter is cascaded with the first filter. The second filter includes a pair of acoustically coupled resonators.

Abstract: In some embodiments, a variable stiffness structure is provided having constant stiffness material layers and variable modulus material layers arranged in alternating layers. The variable modulus material layers have a material with a changeable elastic modulus in response to an applied energy field so as to allow reversible coupling and decoupling of stress transfer between successive layers of the constant stiffness material layers to provide a change in a bending stiffness of the variable stiffness structure. The constant stiffness material layers may include segmented portions. The constant stiffness material layers may have segmented portions arranged such that successive layers of the plurality of constant stiffness material layers have overlapping segmented portions. The variable modulus material layers may have shaped structures, for example, corrugation, pillars, striations, tubular, or honeycomb configurations.

Abstract: In one implementation, a method for fabricating a tiered structure is provided, which includes forming a source and a drain on a substrate with a gate formed therebetween. Formation of the gate includes depositing a gate foot using a gate foot mask having an opening through it to define the gate foot over the substrate. After forming the gate foot, the gate foot mask is stripped. A gate head mask is formed over the gate foot with the gate head mask exposing a top portion of the gate foot. A gate head is formed on the top portion of the gate foot using the gate head mask. A lift-off process is performed, removing the gate head mask.

Abstract: In one embodiment, a solder preform includes a solder matrix having microparticles secured with the solder matrix. The microparticles are constructed so as to be capable of arranging during a solder bonding process so as to provide a uniform separation between opposing soldered surfaces. The microparticles may be shaped to inhibit stacking of the microparticles while self arranging during the solder bonding. The solder preform may have an amount of microparticles with respect to the solder matrix to inhibit stacking of the microparticles during the solder bonding process. Microparticles may be spheres, powders, polyhedrons, crystalline particles, nanostructures, or the like, which may be capable of conducting electric current, or may be dielectric material; for example glass, plastic, metal, or semiconductor material.

Abstract: In one embodiment, a substrate assembly includes a flat substrate having oppositely disposed planar surfaces and a conductor. The conductor is formed on at least one of the planar surfaces and defines a conductor plane. The structure further includes an oversized-in-diameter anti-pad formed through the substrate layer and the conductor layer. The anti-pad further includes a dielectric spacer formed substantially coplanar with the conductor plane.

Abstract: In one implementation, a method is provided for an image guide coupler. The method includes controlling a coupling between adjacent waveguides of a propagating wave by controlling a coupling through at least one field pick up probe positioned next to the adjacent waveguides. In some implementations, controlling the coupling through the at least one field pick up probe includes using a series connected switch. In some implementations, the method includes controlling the coupling through the at least one field pick up probe using a pin diode, a transistor, a MEMS switch, or a varactor, in series with the at least one field pick up probe.

Abstract: One nanostructured actuator embodiment includes an actuation region between electrical contacts. The actuation region includes an elastic matrix with embedded nanocomposite layered structures, which have inorganic material layers with pillared organic material structures between the inorganic material layers responsive to the surface acidity of the inorganic material layers. The elastic matrix allows transport of species for changing the surface acidity. A separator region is between the electrical contacts. A proton generation region capable of reversible electrochemical production and elimination of protons is provided, which may be a hydrogen storage material located on a side of the separator region opposite the actuation region, which may include metal hydride, or metal hydroxide. Alternatively, it may include an electrolytic solution and conductive particles within the elastic matrix for in situ electrochemical generation of an acid/base.

Abstract: In one embodiment, a tester interface module for connecting a plurality of signal paths from at least one electronic assembly to at least one other electronic assembly is provided. The interface module includes a capture board having center conductor vias with center conductor holes extending through the capture board. Axial cables secured to the capture board have center conductors extending at least part way through a corresponding center conductor hole of the center conductor via. An interface component is adjacent to the capture board, the conductor paths being conductively bonded to the conductor vias of the capture board so as to electrically connect center conductors to corresponding conductor paths. The conductor paths of the interface component are arranged to allow connection with an electronic assembly.

Abstract: A failure analysis memory is disclosed for use with a semiconductor tester for storing bit image failure information relating to a memory-under-test. The semiconductor tester has a plurality of channel cards disposed proximate the memory-under-test. The failure analysis memory includes a memory controller and a plurality of memory units disposed in communication with the memory controller. The memory units are distributed on the channel cards.

Abstract: In one embodiment, an image guide coupler switch is provided having a dielectric image guide coupler with a coupling control circuit. In this embodiment the coupling control circuit has at least one field pick up probe which extends at least part way across the image guide coupler. A switch is connected in series with the at least one field pick up probe. An optional capacitor my be provided in series with the series with the switch. In some embodiments, a pair of field pick up probes is provided, with the switch being connected in series with and between the pair of field pick up probes. Some embodiments may have multiple pairs of field pick up probes, each having a switch connected in series with a pair of field pick up probes. An optional capacitor may be provided in series with the pair of field pick up probes.