Abstract: An interface for a read-while-write memory. A memory device includes a single-chip memory array and an interface that is responsive to one or more commands to configure the memory array in a read-while-write configuration.
Type:
Grant
Filed:
January 5, 1998
Date of Patent:
January 30, 2001
Assignee:
Intel Corporation
Inventors:
Ranjeet Alexis, Peter K. Hazen, Charles W. Brown, Robert E. Larsen