Abstract: A semiconductor topography including integrated circuit gate conductors incorporating dual polysilicon layers is provided. The semiconductor topography includes a semiconductor substrate. A first gate conductor is arranged upon a first gate dielectric and above the semiconductor substrate, and a second gate conductor is arranged upon a second gate dielectric and above the semiconductor substrate. The semiconductor substrate may contain a first active region laterally separated from a second active region by a field region. The first gate conductor may be arranged within the first active region, and the second gate conductor may be arranged within the second active region. Each gate conductor preferably includes a second polysilicon layer portion arranged upon a first polysilicon layer portion. The thicknesses of the first gate conductor and the second gate conductor are preferably equal.
Type:
Grant
Filed:
January 26, 1999
Date of Patent:
October 24, 2000
Assignee:
Advanced Micro Devices, Inc.
Inventors:
Jon D. Cheek, Daniel Kadosh, Mark W. Michael
Abstract: An audio decoder is provided with a programmable and re-configurable downmixing process. In one embodiment, the audio decoder includes a control module and a data path. The data path is configured to read, scale, add, and write audio samples to and from various audio channel frame buffers. The control module implements state diagrams which specify various control signals for directing the operations of the data path. The control module implements state diagrams for directing windowing and downmixing operations. The order in which these operations are performed may be reconfigurable, i.e. downmixing may be performed before or after windowing. This reconfigurability advantageously permits the system designer to trade a slight audio quality enhancement for a decreased memory requirement for some speaker configurations. The downmixing operation requires scaling coefficients which are provided by the control module.
Type:
Grant
Filed:
June 17, 1998
Date of Patent:
October 3, 2000
Assignee:
LSI Logic Corporation
Inventors:
Mahadev S. Kolluru, Patrick Pak-On Kwok, Satish Soman