Patents Represented by Attorney, Agent or Law Firm Coudert Brothers
  • Patent number: 7019345
    Abstract: The present invention provides a CMOS imager with a reset scheme, by which a CMOS imager generates a sub-kTC noise so that read noise does not depend on the sense node capacitance. By using a column feedback circuit, reset noise can be suppressed to a negligible amount so that photogate APS or CCD-like circuits can achieve noise performance to very efficient value. This scheme allows increasing sense node capacitance without increasing the noise and also achieves a large full-well value without sacrificing read noise performance. The feedback circuit in one of the embodiment of the present invention is located at the column side of the circuit. This design provides a minimal change to the pixel. As a result quantum efficiency or pixel size is not compromised. The present invention allows a CMOS imager to capture scene with high intra-scene contracts under low illumination with high dynamic range.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: March 28, 2006
    Assignee: California Institute of Technology
    Inventors: Bedabrata Pain, Thomas J. Cunningham, Bruce Hancock, Suresh Seshadri, Monico Ortiz, Guang Yang
  • Patent number: 7016346
    Abstract: Converters and a corresponding method for converting serial data to parallel format and vice versa, particularly for use in switches for telecommunications applications. The converters comprise a storage element associated with each serial channel and comprising two arrays of storage elements. At any one time, the storage elements are accessed sequentially while those of the other array are accessed in parallel. A data bus, divided into portions by buffers, connects the by buffers, connects the serial channel to all storage cells in an associated storage element. For serial to parallel conversion, the buffers latch data from one bus portion to the next in accordance with a write cycle during which one storage element is written. Writing commences from the bus portion furthest from the incoming serial channel and storage elements on either side of a buffer are written simultaneously. The resulting delay between writing arrays words allows checking of the data such as synchronization.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: March 21, 2006
    Assignee: SwitchCore A.B.
    Inventors: Jonas Alowersson, Bertil Roslund, Patrik Sundström
  • Patent number: 6987937
    Abstract: A reassembled toner cartridge and method of manufacture in which a reassembled toner cartridge is resealed by simultaneous ultrasonic welding at multiple locations resulting in improved product performance, increased production efficiency and decreased production cost.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: January 17, 2006
    Assignee: Wazana Brothers International, Inc.
    Inventors: Yoel Wazana, Joda Paulus
  • Patent number: 6980441
    Abstract: A control circuit and corresponding method, particularly for power converters in a system having paralleled power converters, for rapidly and efficiently controlling a free-wheeling synchronous rectifier, so as to prevent any large negative current flow that might cause damage to components of the converter during a fault condition where the PWM signal turns off or has missing cycles. Preferably, clock signal and the gate drive output of a PWM controller are compared in order to recognize a failure condition and to rapidly provide control of the synchronous rectifier so as to prevent the large negative current flow. Control of the free-wheeling synchronous rectifier is provided in a way that is dependent on the gate drive output of the PWM controller and independent of timing, current sense signals, voltage sense signals, the current share system, and the operation of the forward synchronous rectifier of the power converter.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: December 27, 2005
    Assignee: Astec International Limited
    Inventor: Chiang Man-ho
  • Patent number: 6945738
    Abstract: Embodiments of the present invention are directed to a method and apparatus for safety protection control of temporary roof support. In one embodiment, a temporary roof support has a load sensing member. In another embodiment, a beam structure of temporary roof support is supported by a load sensing pin. Strain gages are installed within the pin to measure the load placed upon the pin. An unusually high load being sensed by the pin indicates that the roof has fractured and the temporary roof support is supporting loose rock. In one embodiment, when an unusually high load is measured at the pin, the temporary roof support controls at the front of the machine are disabled. A second set of remotely located temporary roof support controls remain operative. In one embodiment, the second set of controls is located at the rear of the machine.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: September 20, 2005
    Assignee: DBT America
    Inventors: Roger O'Quinn, David Wallace, Michael Twigger, Chitra Ranganathan
  • Patent number: 6930806
    Abstract: A stand alone flat bed scanner including a CPU, a removable storage medium, a control system displaying digital image and controls for controlling the mode of operation, degree of resolution, related parameters associated with generating, storing and displaying digital data. Ports for printers, accessories and other peripherals, an internal hard drive, and software adapted to display images directly on a television screen, including battery, and a pivotal handle for portable use in environments not having an external power supply.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: August 16, 2005
    Assignee: Microtek International, Inc.
    Inventors: Loi Han, Wen Shu Bonny Chen, Yu-Cheng Sheng
  • Patent number: 6914812
    Abstract: A floating gate circuit has a level shift circuit. The floating gate circuit includes: a floating gate; a first and second tunnel device formed respectively between a first and second tunnel electrode; a first circuit coupled to the floating gate for generating an output voltage at an output terminal; a level shift circuit having a third tunnel device coupled between the output terminal and the first tunnel electrode; and a second circuit for causing a first current to flow through the first and second tunnel devices and for causing a second current to flow through the third tunnel device. The floating gate circuit then settles to a steady state condition during the set mode such that the first and second currents are approximately equal and the floating gate voltage and the output voltage are approximately equal.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: July 5, 2005
    Assignee: Intersil America Inc.
    Inventor: William H. Owen
  • Patent number: 6906609
    Abstract: A transformer having at least one primary winding and one secondary winding. The windings are disposed between walls of a first and second bobbin member. In preferred eombodiments, the creepage distance between the windings can be increased by providing a flange on one of the walls of one of the bobbin members.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: June 14, 2005
    Assignee: Astec International Limited
    Inventor: John Piechnick
  • Patent number: 6907210
    Abstract: A remanufactured laser printer toner cartridge incorporates a used doctor blade and/or a used wiper blade. The used doctor blade has been adapted and oriented to make contact with a developer roller or a magnetic roller along a previously unused portion of the doctor blade's metering surface to utilize a new fresh metering surface. The used wiper blade has been adapted and oriented to make contact with a photoconductive drum along a previously unused portion of the wiper blade's wiping surface to utilize a new fresh wiping surface. The invention extends the effective life of doctor blades and wiper blades by utilizing previously unused working surfaces. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not to be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: September 13, 2003
    Date of Patent: June 14, 2005
    Assignee: Wazana Brothers International, Inc.
    Inventors: Yoel Wazana, Jesus Gonzalez
  • Patent number: 6898123
    Abstract: A method and circuit for setting a reference voltage in a dual floating gate circuit is disclosed. During a set mode, a first and second floating gate are programmed to different charge levels that are a function of an input set voltage capacitively coupled to the first floating gate during the set mode. During a read mode, this difference in charge level is used by the dual floating gate circuit to generate a reference voltage that is a function of the input set voltage, and is preferably equal to the input set voltage.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: May 24, 2005
    Assignee: Intersil Americas Inc.
    Inventor: William H. Owen
  • Patent number: 6894928
    Abstract: An apparatus and method is provided for adjusting a reference voltage at an output terminal of a floating gate reference voltage generator circuit in order to improve the accuracy of the reference voltage at an input terminal of a load circuit. The apparatus and method compensates for the voltage drop produced between the output terminal of the reference voltage generator circuit and the input terminal of the load circuit, and includes a capacitor for capacitively coupling the voltage at the input terminal of said load circuit to a floating gate, and a differential amplifier operatively coupled to the floating gate which acts in response to the capacitively coupled load circuit input voltage to adjust the voltage at the output terminal such that the voltage at the input terminal of the load circuit becomes equal to the reference voltage.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: May 17, 2005
    Assignee: Intersil Americas Inc.
    Inventor: William H. Owen
  • Patent number: 6894466
    Abstract: An active current sharing circuit that provides a plurality of paralleled DC-DC converters each having a lossless inductor-based current sensing circuit for sensing the average current of the associated DC-DC converter through its output inductor, and a means for adjusting the voltage reference coupled to each of the DC-DC converter's PWM controllers through a one pin interconnection between the converters. The circuit provides a high percentage current sharing level at lower cost, with reduced circuit wiring complexity, and fewer components. In an alternate embodiment, the inductor-based current sensing is replaced with a resistor-based current sensing, such that comparable current sharing levels are achieved albeit with higher loss.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: May 17, 2005
    Assignee: Astec International Limited
    Inventors: Hong Huang, Chris M. Young
  • Patent number: 6893527
    Abstract: Methods of making articles are provided in which a self-supporting structure formed of natural polymer has a self-adherent, moisture resistant thermoplastic film comprising gelatinized starch and a hydroxy-functional polyester on the structure surface. The self-supporting structure preferably is a starch and polyvinyl alcohol blend in an expanded form. The articles typically do not delaminate even when soaked in water, and are biodegradable.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: May 17, 2005
    Inventors: William M. Doane, John W. Lawton, Jr., Randal Shogren
  • Patent number: 6888061
    Abstract: The present invention relates to optimization of communication equipment with respect to size and undesired signal interference. To this aim a ceramic feedthrough interconnection assembly is proposed in order to transport an electrical information signal to and from a communication capsule. In addition to at least one signal lead (103a, 103b) for communicating an electrical information signal, the assembly contains at least one auxiliary lead and a shield (103c, 103d, 104, 104a, 104b, 104f) that electrically shields the at least one signal lead (103a, 103b) from the at least one auxiliary lead. The shield (103c, 103d, 104, 104a, 104b, 104f) has such dimensions (d1, d2) and is positioned at such distance (d3, d4, d12) from the at least one signal lead (103a, 103b) that the electrical information signal experiences a well-defined and substantially constant impedance in the assembly. This in turn, minimizes the risk of undesired signal reflections. At the same time the assembly allows a high lead density, i.e.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: May 3, 2005
    Assignee: Optillion AB
    Inventors: Lars Lindberg, Lars-Gote Svenson, Edgard Goodbar
  • Patent number: 6870764
    Abstract: A floating gate circuit in a read mode that includes at least one floating gate and an analog feedback circuit is disclosed. The feedback circuit causes the floating gate circuit to reach a steady state condition in the read mode such that a reference voltage is generated that is a predetermined function of an input set voltage used to set the at least one floating gate. In a preferred embodiment, the reference voltage generated is approximately equal to the input set voltage.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: March 22, 2005
    Assignee: Xicor Corporation
    Inventor: William H. Owen
  • Patent number: 6867622
    Abstract: A method and apparatus for setting a floating gate in a floating gate circuit using dual conduction of Fowler-Nordheim tunnel devices is disclosed. In one embodiment, the present invention comprises a floating gate circuit having a single floating gate. During a set mode, the charge level on the floating gate is modified until it is set to a predetermined charge level that is a function of an input set voltage. In another embodiment, the floating gate circuit comprises two floating gates. During a set mode the charge level on each of the floating gates is modified until the difference in charge level between the two floating gates is a predetermined function of an input set voltage that is capacitively coupled to one of the floating gates during the set mode.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: March 15, 2005
    Assignee: Xicor, Inc.
    Inventor: William H. Owen
  • Patent number: 6856641
    Abstract: The present invention is a method and apparatus for using ring resonators to produce narrow linewidth hybrid semiconductor lasers. According to one embodiment of the present invention, the narrow linewidths are produced by combining the semiconductor gain chip with a narrow pass band external feedback element. The semi conductor laser is produced using a ring resonator which, combined with a Bragg grating, acts as the external feedback element. According to another embodiment of the present invention, the proposed integrated optics ring resonator is based on plasma enhanced chemical vapor deposition (PECVD) SiO2/SiON/SiO2 waveguide technology.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: February 15, 2005
    Assignee: California Institute of Technology
    Inventor: Alexander Ksendzov
  • Patent number: 6856837
    Abstract: A method and device are disclosed for using electrochemistry to build and strengthen muscles by applying pulses of DC electrical charge, at a duration in the range of about 0.2 to about 1 millisecond and a frequency of at least 1000 Hertz, to the skin by means of an anodic probe overlying the motor endplate regions/neuromuscular junctions of the muscle at such a strength to cause the muscle to twitch or only slightly contract with each pulse. The DC is applied at current amplitude of from about 5 to about 25 milliamperes, and a voltage in the range of about 50 to about 120 volts. A DC power source is used to deliver the electrical charge, preferably of at least 3 watts.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: February 15, 2005
    Inventor: Gregory C. O'Kelly
  • Patent number: D505668
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: May 31, 2005
    Inventor: Alan Liu
  • Patent number: D505669
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: May 31, 2005
    Inventor: Alan Liu