Patents Represented by Attorney Courtney IP Law
  • Patent number: 8288200
    Abstract: A semiconductor device is described that includes a die connected between a conductive platform and a conductive clip. The semiconductor device is formed by a process that includes mounting a first surface of each of multiple die to each of a number of conductive mounting platforms of a lead frame structure. The process also mounts a clip structure to the lead frame structure, the clip structure including a number of conductive clips. Mounting of the clip structure to the lead frame structure includes aligning each of the conductive clips with corresponding ones of the conductive mounting platforms so that a portion of each of the conductive clips contacts a second surface of a corresponding die.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: October 16, 2012
    Assignee: Diodes Inc.
    Inventor: Tan Xiaochun
  • Patent number: 8248515
    Abstract: Various approaches to imaging involve selecting directional and spatial resolution. According to an example embodiment, images are computed using an imaging arrangement to facilitate selective directional and spatial aspects of the detection and processing of light data. Light passed through a main lens is directed to photosensors via a plurality of microlenses. The separation between the microlenses and photosensors is set to facilitate directional and/or spatial resolution in recorded light data, and facilitating refocusing power and/or image resolution in images computed from the recorded light data. In one implementation, the separation is varied between zero and one focal length of the microlenses to respectively facilitate spatial and directional resolution (with increasing directional resolution, hence refocusing power, as the separation approaches one focal length).
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: August 21, 2012
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Yi-Ren Ng, Patrick M. Hanrahan, Mark A. Horowitz, Marc S. Levoy
  • Patent number: 8243157
    Abstract: Digital images are computed using an approach for correcting lens aberration. According to an example embodiment of the present invention, a digital imaging arrangement implements microlenses to direct light to photosensors that detect the light and generate data corresponding to the detected light. The generated data is used to compute an output image, where each output image pixel value corresponds to a selective weighting and summation of a subset of the detected photosensor values. The weighting is a function of characteristics of the imaging arrangement. In some applications, the weighting reduces the contribution of data from photosensors that contribute higher amounts of optical aberration to the corresponding output image pixel.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: August 14, 2012
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Yi-Ren Ng, Patrick M. Hanrahan, Mark A. Horowitz, Marc S. Levoy
  • Patent number: 8149577
    Abstract: The present invention relates to a self-cooled thyistor device for ultra-high voltage fault current limiter. a self-cooled thyristor valve, it adopts horizontal structure consisted by frames, frames is divided into upper and below two spaces by crossbeams, the bottom of frames is supported by insulators. There is a cross plate between two vertical said frames, the cross plate mounts resistors connect with a high potential plate and capacitor through two wires. There is a thyistor string in said frame upper space, which is constituted of thyistors and cooler series. The thyistor string is compressed tightly by press-fit mechanism, thyistor string crosses current transformers. There are high potential plates on both sides of the thyistor, the number of the potential plates is equal to that of thyistor. One side of the high potential plates links frames, said current transformers connects with high potential plates.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: April 3, 2012
    Assignee: China Electric Power Research Institute
    Inventors: Guangfu Tang, Yuanliang Lan, Huafeng Wang, Hongzhou Luan, Zhiqi Li, Haiyu Yu, Huaxin Wang, Jing Zhang
  • Patent number: 8138923
    Abstract: Embodiments of an RFID security system and method are described herein. Embodiments include an RFID security server or appliance and RFID security software. In an embodiment, the RFID security server is placed between an RFID reader and an enterprise back-end. Thus the system operates at the point where the RFID data stream leaves the RF interface and enters a physical transmission medium before any other active components on the network (such as databases, middleware, routers). The RFID security server analyzes RFID tag data (including meta-data) received from the reader in-band and detects malware and errors in the data. RFID tag data containing malware or errors is blocked from entering the enterprise back-end. In an embodiment, analyzing RFID tag data includes generating a security stamp that is uniquely associated with the tag data. The security stamp is stored on the RFID tag, or alternatively, stored separately for later comparison in order to detect tampering.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: March 20, 2012
    Assignee: Neocatena Networks Inc.
    Inventors: Lukas Grunwald, Boris Wolf
  • Patent number: 8089330
    Abstract: The present invention provides a novel direct current thyristor valve saturated reactor includes: case, winding in the case, iron cores, cooling fins, pipes and press fit mechanism. The iron cores are coupled with winding. The invention having the following advantages: simple, modular design, low connection capacity of the wingding, fixed dimension, winding and irons well-cooled, small noise and vibration. The saturated reactor is particularly suitable used as the positive saturated reactor for high voltage current thyristor valve.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: January 3, 2012
    Assignee: China Electric Power Research Institute
    Inventors: Jialiang Wen, Xiaoguang Wei, Haiyu Yu, Sheng Zhang
  • Patent number: 8086508
    Abstract: A delegated authority system allows an account holder to delegate authority to one or more individuals, such as financial advisors through a third party service. An individual receives authority to access financial accounts and/or access aggregated financial data. The individual may then retrieve account information from the individual accounts or from the aggregated financial data. In on exemplary system, the account information is accessed via the Internet or another data communication network.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: December 27, 2011
    Assignee: CashEdge, Inc.
    Inventors: Sanjeev Dheer, Venkatachari Dilip, Roy Messing, Jeremy Sokolic, Manu Sareen, Gautam Sinha
  • Patent number: 7964933
    Abstract: A method of fabricating a semiconductor integrated circuit including a power diode includes providing a semiconductor substrate of first conductivity type, fabricating a integrated circuit such as a CMOS transistor circuit in a first region of the substrate, and fabricating a power diode in a second region in the semiconductor substrate. Dielectric material is formed between the first region and the second regions thereby providing electrical isolation between the integrated circuit in the first region and the power diode in the second region. The power diode can comprise a plurality of MOS source/drain elements and associated gate elements all connected together by one electrode of the diode, and a semiconductor layer in the second region can function as another source/drain of the power diode.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: June 21, 2011
    Assignee: Diodes Inc.
    Inventors: Paul Chang, Geeng-Chuan Chern, Prognyan Ghosh, Wayne Y. W. Hsueh, Vladimir Rodov
  • Patent number: 7936392
    Abstract: Image data is processed to facilitate focusing and/or optical correction. According to an example embodiment of the present invention, an imaging arrangement collects light data corresponding to light passing through a particular focal plane. The light data is collected using an approach that facilitates the determination of the direction from which various portions of the light incident upon a portion of the focal plane emanate from. Using this directional information in connection with value of the light as detected by photosensors, an image represented by the light is selectively focused and/or corrected.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: May 3, 2011
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Yi-Ren Ng, Patrick M. Hanrahan, Marc S. Levoy, Mark A. Horowitz
  • Patent number: 7903118
    Abstract: Embodiments described herein provide a programmable mapping scheme for mapping information to resources of a system. In an embodiment, a programmable lattice method operates to map information to resources of a system. For example, the programmable lattice method can be used to map pixel data to graphics processing resources of a graphics processing system. In another embodiment, a programmable hybrid method operates to map information to resources of a system. For example, the programmable hybrid method can be used to map pixel data to graphics processing resources of a graphics processing system. The mapping methods described are applicable to any multi-dimensional array processing (e.g., 2D and 3D). The methods provide a uniform distribution of resources and tend to reduce resource collisions when allocating information to a resource.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: March 8, 2011
    Assignee: AMD Inc.
    Inventors: Konstantine Iourcha, Gordon Elder, Elaine Poon
  • Patent number: 7873677
    Abstract: Data is captured from a web site or other data source. Data is extracted from the web page using a data harvesting script or other data acquisition routine. The extracted data is then normalized and stored in a database. If data cannot be extracted from the web page, a copy of the captured web page is stored without personal information contained in the web page. The data harvesting script is then edited based on an analysis of the captured web page.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: January 18, 2011
    Assignee: Cashedge, Inc.
    Inventors: Roy Messing, Jeremy N. Sokolic, Sanjeev Dheer, Venkatachari Dilip
  • Patent number: 7868761
    Abstract: Embodiments of an RFID security system and method are described herein. Embodiments include an RFID security server or appliance and RFID security software. In an embodiment, the RFID security server is placed between an RFID reader and an enterprise back-end. Thus the system operates at the point where the RFID data stream leaves the RF interface and enters a physical transmission medium before any other active components on the network (such as databases, middleware, routers). The RFID security server analyzes RFID tag data (including meta-data) received from the reader in-band and detects malware and errors in the data. RFID tag data containing malware or errors is blocked from entering the enterprise back-end. Unwanted RFID tags are also identified and filtered as noise.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: January 11, 2011
    Assignee: Neocatena Networks Inc.
    Inventors: Lukas Grunwald, Boris Wolf
  • Patent number: 7869525
    Abstract: A dynamic bus inversion (DBI) method and system are described. In various embodiments, a transmitter transmits data over a multi-bit high-speed bus to a receiver. In an embodiment, the transmitter determines whether to invert the bus based on the number of data bits that will be transitioning to a new value. If it is determined that the bus is to be inverted, the transmitter encodes a DBI signal on a shared line of the bus. In an embodiment, the shared line is used for different purposes at different times, obviating the need for a dedicated line or pin for the encoded DBI signal. The receiver receives and decodes the DBI signal and, in response, appropriately decodes the received data.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: January 11, 2011
    Assignee: ATI Technologies, Inc.
    Inventors: Joseph D. Macri, Stephen Morein, Ming-Ju E. Lee, Lin Chen
  • Patent number: 7869293
    Abstract: A scannable IO circuit featuring reduced latch count for pipelined memory architectures and test methodology. For a pipelined memory system performing at speed tests, the timing sequence for processing a test command includes a precharge-read-precharge-write sequence for each clock cycle starting with the rising clock edge. The memory circuit utilizing this test command timing sequence comprises a sense amplifier and a single latch. The sense amplifier itself is used as a latch to implement scan functionality for the memory circuit. The memory device is incorporated into an integrated test wrapper circuit that executes back-to-back commands through serial compare operations using integrated scan flip-flop circuits. The test wrapper includes a fanout block and padded address scheme for testing multiple and disparate size memory devices in parallel.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: January 11, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Stephen L. Morein
  • Patent number: 7849256
    Abstract: Embodiments of a distributed memory controller system implemented on a single integrated circuit device are described. In one embodiment, a memory controller that provides an interconnection circuit between a first plurality of memory devices to a second plurality of memory clients includes a ring bus to route at least one of the memory request and data return signals between the memory clients and the memory devices. The ring bus is configured in a ring topography that is distributed across a portion of an integrated circuit device, resulting in a reduction in the maximum wiring density at the center of memory controller. The ring bus structure also reduces the overall number of interconnections as well as the number of storage elements, thus reducing the total area used by the memory controller.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: December 7, 2010
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Warren F. Kruger, Patrick Law, Alexander Miretsky