Abstract: A timing architecture for a delivery unit that interfaces telecommunications media to a switching matrix. The delivery unit is functionally partitioned into a number of application modules. Transport between the modules is handled by a bus control module, with ingress buses from the application modules to the bus control module and egress buses from the bus control module to the application module. The bus control module also distributes system timing signals to each application module on these buses. The application modules each have a common bus interface that derives common local timing signals. They also each have a common local timebase that derives additional local timing signals. The bus interface is also used to deliver synchronization signals back to the bus control module.