Patents Represented by Attorney Crawford Maunu PLLC
  • Patent number: 7200721
    Abstract: A method and apparatus for testing cache coherency in a multiprocessor data processing arrangement. Selected values are written to memory by a plurality of threads, and consistency of the values in the memory with the values written by the plurality of threads is verified. Performance characteristics of the data processing system are measured while writing the values, and in response to the performance characteristics relative to target performance characteristics, parameters that control writing by the plurality of threads are selectively adjusted.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: April 3, 2007
    Assignee: Unisys Corporation
    Inventors: Michelle J. Lang, William Judge Yohn
  • Patent number: 7194155
    Abstract: Optical data is processed and transmitted in a multimode transmission medium in a manner that facilitates the mitigation of interference such as that often referred to as intersymbol interference (ISI). According to an example embodiment of the present invention, a spatial light modulator is controlled to adaptively spatially filter light to be passed on a multimode transmission medium such as a multimode optical fiber.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: March 20, 2007
    Assignees: The Board of Trustees of the Leland Stanford Junior University, Rambus Inc.
    Inventors: Joseph M. Kahn, Mark A. Horowitz, Elad Alon, Vladimir M. Stojanovic
  • Patent number: 7188060
    Abstract: A method and apparatus for emulating a high-precision, high-accuracy clock. In one embodiment, two clocks are used in the emulation. The first clock has precision greater than precision of the second clock and accuracy less than accuracy of the second clock. A checkpoint time relative to elapsed cycles of the second clock and a checkpoint cycle count of cycles of the first clock are periodically stored relative to a checkpoint period that lasts for a selected number of cycles of the second clock. A reference cycle rate of the first clock is calculated relative to the cycle rate of the second clock. The current time is determined as a function of the checkpoint time, a number of cycles of the first clock elapsed since storing the most recent checkpoint cycle count, and the reference cycle rate of the first clock.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: March 6, 2007
    Assignee: Unisys Corporation
    Inventor: James W. Adcock
  • Patent number: 7183228
    Abstract: Patterned growth of arrays of SWNTs is achieved at the full-wafer scale. According to an example embodiment of the present invention, the chemistry of CH4 CVD has been discovered to be sensitive to the concentration of H2, leading to three regimes of growth conditions. The three regimes are identified for particular growth conditions and a regime that facilitates carbon nanotube growth while inhibiting pyrolysis is identified and used during CVD growth of the nanotubes. This approach is also useful for CVD synthesis of other nanomaterials. In this manner, patterned growth of carbon nanotubes is facilitated while inhibiting undesirable conditions, making nanotube orientation control and device integration possible on a large scale.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: February 27, 2007
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Hongjie Dai, Nathan R. Franklin
  • Patent number: 7185029
    Abstract: Method and apparatus for expanding usable space for an application data file. A control file is maintained with control structures that indicate available and allocated portions of usable space in the data file, along with quantities of available space in portions of the data file. Access to the control structures is limited while the file is undergoing expansion. Space is allocated in the control file for new versions of control structures, and the contents of the control structures are copied to the space for the new versions of the control structures. Pointers that reference the control structures and that are maintained in the control file are updated to reference the new versions of the first and second control structures.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: February 27, 2007
    Assignee: Unisys Corporation
    Inventors: Scott L. Titus, Sherry L. Crandall
  • Patent number: 7177791
    Abstract: The various embodiments of the invention relate to analyzing operations of an emulated input-output processor. Instructions native to the first type of instruction processor are emulated on a second-type instruction processor. The instruction processor emulator executes an operating system that includes instructions native to the first type of instruction processor. The operating system includes instructions that write input/output (IO) requests to the memory arrangement in response to IO functions invoked by a program. An IOP emulator that is executable on the second-type processor emulates IOP processing of IO requests from the memory arrangement. The IOP emulator maintains in the memory arrangement a first set of data structures used in processing the IO requests. State data currently contained in the data structures is stored on a retentive storage device, and in response to user input controls, the state data is read from retentive storage and displayed.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: February 13, 2007
    Assignee: Unisys Corporation
    Inventors: Carl R. Crandall, Craig B. Johnson, Mitch M. Maurer, Yonghe Liu
  • Patent number: 7177366
    Abstract: In an automatic phase alignment circuit for a Cartesian feedback amplifier, the phase error is regularly monitored. In various implementations, this approach is used to provide true and continuous phase alignment. Based on a relationship between the up-converted and down-converted signals, another implementation of the invention provides phase-alignment for quadrature-phase components of a baseband signal by arithmetically combining the quadrature-phase components and the feedback components continuously and, in response, continuously phase-adjusting signals in the feed-forward signal path. Another aspect of the present invention is directed to an approach for calculating phase error for that is caused by DC-offset interference which, in turn, manifest at the outputs of many analog functional blocks.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: February 13, 2007
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Joel L. Dawson, Thomas H. Lee
  • Patent number: 7166325
    Abstract: Nanotubes and nanotube-based devices are implemented in a variety of applications. According to an example embodiment of the present invention, a nanotube device is manufactured having a nanotube extending between two conductive elements. In one implementation, each conductive element includes a catalyst portion, wherein electrical connection is made to opposite ends of the nanotube at each of the catalyst portions. In one implementation, the conductive elements are coupled to circuitry for detecting an electrical characteristic of the nanotube, such as the response of the nanotube to exposure to one or more of a variety of materials. In another implementation, the nanotube device is adapted for chemical and biological sensing. In still another implementation, a particular functionality is imparted to the nanotube using one or more of a variety of materials coupled to the nanotube, such as metal particles, biological particles and/or layers of the same.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: January 23, 2007
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Hongjie Dai, Jing Kong
  • Patent number: 7158563
    Abstract: Methods, apparatus and systems for dynamically controlling a digital communication system, such as a DSL system, collect information about digital communication lines in the system and adaptively and/or dynamically determine line and signal characteristics of the digital communication lines, including interference effects. Based on the determined characteristics and the desired performance parameters, operation of the digital communication lines is adjusted to improve or otherwise control the performance of the system. The collection and processing of information may be performed by a party that is not a user in the system. This independent party also may control operational characteristics and parameters of the system. The invention can be used to eliminate or reduce signal interference such as crosstalk that can be induced on communication lines in systems such as DSL systems. Specific iterative power allocation and vectored transmission techniques and apparatus are disclosed.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: January 2, 2007
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Georgios Ginis, Wei Yu, Chaohuang Zeng, John M. Cioffi
  • Patent number: 7146414
    Abstract: A method and apparatus for operating a server system. In one embodiment a server-control element is coupled to the server system and is configured to provide access to management functions for managing the server system. The server-control element generates event reports in response to status data received from the server system, each event report containing status data indicative of an operational characteristic of the server system. A bridge is coupled to the server-control element and is configured to register with the server-control element to receive events reports. The bridge stores data from the event reports. Command requests received from a bridge-type client by the bridge are submitted to the server-control element, the commands specified by the command requests for invoking the management functions. The bridge provides the stored data from event reports to the bridge-type client in response to requests for the stored data.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: December 5, 2006
    Assignee: Unisys Corporation
    Inventors: James A. Sievert, Douglas P. Van Vreede
  • Patent number: 7135745
    Abstract: A semiconductor device having a thyristor-based device and a pass device exhibits characteristics that may include, for example, resistance to short channel effects that occur when conventional MOSFET devices are scaled smaller in connection with advancing technology. According to an example embodiment of the present invention, the semiconductor device includes a pass device having a channel in a fin portion over a semiconductor substrate, and a thyristor device coupled to the pass device. The fin has a top portion and a side portion and extends over the semiconductor substrate. The pass device includes source/drain regions separated by the channel and a gate facing and capacitively coupled to the side portion of the fin that includes the channel. The thyristor device includes anode and cathode end portions, each end portion having base and emitter regions, where one of the emitter regions is coupled to one of the source/drain regions of the pass device.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: November 14, 2006
    Assignee: T-Ram, Inc.
    Inventors: Andrew Horch, Scott Robins
  • Patent number: 7130413
    Abstract: A near full duplex portable handset speakerphone comprises: a microprocessor; a hands-free receive register connected to the microprocessor; a hands-free transmit register connected to the microprocessor; a ROM having a speakerphone operation algorithm, the ROM-connected to the microprocessor; a first analog-to-digital converter connected to the hands-free receive register; a second analog-to-digital converter connected to the hands-free transmit register; a first programmable digital attenuator connected to the microprocessor and to a speaker; and a second programmable digital attenuator connected to the microprocessor and to a microphone, wherein near full duplex communication is achieved without digital signal processing. In another feature of the invention, the hands-free registers provide a digital representation of the speech volume in each direction to the microprocessor.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: October 31, 2006
    Assignee: Legerity, Inc.
    Inventor: David Ray Dettmer
  • Patent number: 7124165
    Abstract: According to an aspect of the disclosure, the present invention provides methods and arrangements for using the internet and an internet access appliance to share images, wherein the images are captured, downloaded, and sent to a server. At the server, the images are parsed and posted to a web page. Subsequent communication is automatically sent to individuals selected by the sender to notify them of the posting of new images. The present invention provides an effective and efficient manner in which to share images for business, marketing, and home use.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: October 17, 2006
    Assignee: 8x8, Inc.
    Inventors: Keith Barraclough, Michael Noonen
  • Patent number: 7120143
    Abstract: The present invention is directed to audio processing including IP telephony audio processing. Voice-over-IP terminals used in phone terminal applications benefit from a low-power implementation suitable for the limited chassis area of these devices. According to an example embodiment of the present invention, a programmable audio processor chip is adapted to process voice data for IP communications. The chip includes a DSP voice compression device adapted to compress voice data, and audio processing circuitry programmed with an audio processing software application adapted to process the compressed voice data. The chip further includes an IP network stack adapted to store and process IP data. The IP data includes protocols for processing the compressed voice data via an IP network. A communication stack is also included in the chip and is adapted to store and process communications data. The communications data includes audio processing protocols for processing the compressed voice data.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: October 10, 2006
    Assignee: 8x8, Inc.
    Inventors: Bryan R. Martin, Ian John Buckley, Philip Bednarz, Douglas A. Chrissan
  • Patent number: 7120899
    Abstract: A method for implementing a hierarchy of component object model interfaces. A hierarchy of component object model interfaces is defined in which an interface at a lowest level of the hierarchy inherits from an interface at the highest level of the hierarchy. A class is defined that includes a first template class that is associated with the highest level of the hierarchy. A second template class inherits from the first template class and is associated with the lowest level of the hierarchy. The second template class is instantiated with an interface as a template parameter. Thus, the instantiation of an object of the most specialized class provides the base interface from which the most generalized class derives.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: October 10, 2006
    Assignee: Unisys Corporation
    Inventor: James A. Sievert
  • Patent number: 7100026
    Abstract: A processor implements conditional vector operations in which, for example, an input vector containing multiple operands to be used in conditional operations is divided into two or more output vectors based on a condition vector. Each output vector can then be processed at full processor efficiency without cycles wasted due to branch latency. Data to be processed are divided into two groups based on whether or not they satisfy a given condition by, e.g., steering each to one of two index vectors. Once the data have been segregated in this way, subsequent processing can be performed without conditional operations, processor cycles wasted due to branch latency, incorrect speculation or execution of unnecessary instructions due to predication. Other examples of conditional operations include combining one or more input vectors into a single output vector based on a condition vector, conditional vector switching, conditional vector combining, and conditional vector load balancing.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: August 29, 2006
    Assignees: The Massachusetts Institute of Technology, The Board of Trustees of the Leland Stanford Junior University
    Inventors: William J. Dally, Scott Rixner, John D. Owens, Ujval J. Kapasi
  • Patent number: 7092940
    Abstract: Method and system for automating operations of a computing arrangement. A pattern database is configured with pattern definitions and associated response definitions, and one or more of the response definitions include one or more commands for operating the computing arrangement. A message processor receives messages from components in the computing arrangement and matches the messages against the patterns in the database. If a message matches a pattern, the message processor performs the actions specified in the associated response definition. One or more of the response definitions queue commands to a command queue. The message processor then dequeues and issues the commands at times that are compatible with the operation being automated.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: August 15, 2006
    Assignee: Unisys Corporation
    Inventors: Donald J. Ethen, James R. Malnati, Paul D. Urevig
  • Patent number: 7092379
    Abstract: An arrangement which includes a telephone and an interface unit, which interfaces the telephone to both a standard switched telephone communications network and an Internet communications network, is disclosed. The interface unit includes an input coupled to the telephone to receive audio information and two output ports configured to be respectively coupled to the standard switched telephone communications network and the Internet communications network. A processing unit couples the audio information received from the telephone to the first output port when the telephonic communication is to be performed using the standard switched telephone communications network. Alternatively, the processing unit processes the audio information received from the telephone in accordance with standard Internet transfer protocols and couples the processed audio information to the second output port when the telephonic communication is to be performed using the Internet communications network and the standard protocols.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: August 15, 2006
    Assignee: 8×8, Inc.
    Inventors: Hardish Singh, Kevin E. Deierling, Bryan R. Martin
  • Patent number: 7088449
    Abstract: Dimensional parameters of metal-containing structures such as films, interconnects, wires and stripes, and nanoparticles are detected using an approach involving plasmon-excitation and one or more metal-constituency characteristics of the metal-containing structures. According to an example embodiment of the present invention, plasmon-exciting light is used to excite plasmons in a structure, the plasmon excitation being responsive to the metal constituency. A characteristic of light reflected from the structure is then used to detect dimensional parameters of the structure. In one implementation, a characteristic of the reflected light that is related to the state of plasmon excitation in the structure is used to detect the dimensional parameters. In another implementation, the angle of incidence of the plasmon-exciting light is used in connection with an intensity-related characteristic of light reflected from structure to detect one or more dimensions of the structure.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: August 8, 2006
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventor: Mark L. Brongersma
  • Patent number: 7088852
    Abstract: Defect analysis of a semiconductor die is enhanced in a manner that makes possible the viewing of spatial manifestations of the defect from virtually any angle. According to an example embodiment of the present invention, substrate is removed from a semiconductor die while simultaneously obtaining images of the portions of the die from which substrate is being removed. The images are taken at various points in the substrate removal process, recorded and combined together to form a three-dimensional image of selected portions of the die. The image is then used to view the selected portions, and the nature of one or more defects therein are analyzed.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: August 8, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael R. Bruce, Victoria J Bruce, Glen Gilfeather