Abstract: A plurality of metal studs are plated on a chip carrier surface in a pattern to match a terminal metal footprint on a chip to be joined. The studs are of sufficient height to permit flux cleaning, if necessary. After the studs are in place, the chip is aligned with the carrier and attached thereto, the chip pads containing a small amount of solder to provide the connecting joints. The carrier and chip are made of materials having nearly equal thermal expansion characteristics.

Abstract: This invention relates to a method and apparatus for wire bonding a variety of metals in the interconnection of semiconductor chips to electronic package substrate circuitries. A pair of electrically conducting bonding tip members are provided which are electrically isolated from one another and which are constructed of a material having a high resistivity. The wire is positioned beneath the tip members and a load is applied to the members to force the wire against a land on the substrate. A voltage source is provided to apply a voltage between the tip members. Activitation of the voltage source results in current flow through the tips and through the wire, in series, causing heating of the tip members and of the section of wire beneath them. Diffusion bonding will initiate before a significant amount of oxidation has had time to occur.

Abstract: A hermetically sealed electronic circuit package is formed by placing a preformed, uncured sealant between a circuitized ceramic substrate and a ceramic cover. The resultant assembly is placed in an oven which has been preheated to a temperature at least as great as the curing temperature of the sealant and the oven is then evacuated. Before the sealant reaches its melting temperature, the oven is backfilled with nitrogen and stabilized at atmospheric pressure. The assembly is maintained in the heated environment for a period of time sufficient to substantially cure the sealant. The resulting assembly may be opened to affect any repairs that may become necessary and then reassembled.

Abstract: A cleaning process for high aspect ratio through holes of multilayer printed circuit boards assures the removal of any loosened fiberous material or epoxy smears in the through holes and also provides an inverted "T" structure at the innerplanes of the internal conductive circuits within the printed circuit board sandwich. The inverted "T" structure helps to move the contact point between the plating of the through hole and the internal circuit lines further into the circuit board, thereby eliminating the "Z" stress at the edge of the innerplane.

Abstract: Subsequent to the additive plating of copper circuitry on a substrate and prior to further steps such as lamination to form a multilayer printed circuit board, a sequence of etching and cleaning steps are used to improve the lamination strength of the additively plated copper. The circuitized substrate is dipped in an etchant bath and then baked at an elevated temperature for 2-4 hours. Following this the circuitized substrate is washed with an organic cleaner, water rinsed and air dried. Thereafter a chlorite oxide layer is added to the circuitized substrate and it is ready for further processing.

Abstract: A polysulfone base stop resist material to protect gold thermocompression bonding sites on a circuit module during a solder dipping operation. Along with the thermoplastic, thermostable strippable base of polysulfone, the resist includes a solvent for the polysulfone and a filler which holds the melted polysulfone in place during the solder dipping operation.

Abstract: A method for error analysis and diagnosis uses error images stored in the system from which significant error information is extracted by analyzing the error bytes of the error image. The error information is combined, via tables, with error information extracted from other error bytes and a reference code is generated by the combination by means of which a predetermined error file is addressed, which contains information on the kind of error, its location and information on the remedying of the error.

Abstract: An instruction execution modification mechanism is described for a digital data processor wherein multiple programs or tasks are performed in a concurrent manner by means of a time slice mechanism which causes the instructions from the different programs to be executed in an interleaved manner. Instructions from the different programs are executed during different successive time slice intervals. The instruction execution modification mechanism is responsive to the occurrences of various predetermined conditions in the data processing system for selectively modifying the normal execution of different ones of the instructions in different ones of the programs. To this end, there is provided a program list mechanism listing the modifiable programs, an instruction list mechanism listing the modifiable instructions and a modification storage mechanism for storing modification signals for the different instructions.

Abstract: A method for performing manual operations, such as address compare equal stop, single cycle alter, etc., in a time slice controlled microprocessor with microprogramming, which avoids stopping the processor clock when any of the programs requires a manual operation. This problem is solved by assigning the manual operations to a specific program, which for the other programs in the multiprogram environment executes the manual operations required.

Abstract: Heat is removed from silicon devices in an integrated circuit package by means of a thermal liquid material contained in a film mounted on the underside of a cover enclosing the integrated circuit device. The film is electrically non-conductive and the film with the enclosed thermal liquid material form a formable pillow such that after the chip/substrate are assembled, the cover with the film containing the thermal liquid material is placed over the substrate and sealed thereto in a manner such that the film comes into direct contact with the top of the chips mounted on the substrate. This provides a direct heat transfer from the chip through the film to the thermal liquid material out to the cover, which may be formed as a heat radiator.

Abstract: For a bubble memory package, the two conductors operative to generate the rotational magnetic field consist of two thin, solid disks with a number of current contact points around their respective peripheries. Then, by selectively advancing the current injection/extraction points around the periphery, the current through the disks and thus the associated magnetic field can be rotated over a full 360.degree. thereby generating the rotational magnetic field required to effect the domain propagation necessary to the operation and function of a bubble memory device.

Abstract: Heat is removed from the silicon devices in an integrated circuit package by means of a stud which is slidably mounted in a cap enclosing the integrated circuit device. A low melt solder is used to join the stud to the cap and the same solder is also deposited on the stud tip, which will subsequently contact the integrated circuit device in the package. After the integrated circuit, substrate and cap are assembled and sealed, the assembly is heated to melt the low melt solder so that the stud slides down and makes contact with the integrated circuit device. A controlled pressure can be applied to the stud if sliding does not occur. Thereafter, the assembly is allowed to cool. Upon cooling, a submicron gap exists between the solder on the tip of the stud and the device providing electrical isolation, but not significantly degrading the thermal path between the device and the ambient atmosphere.

Abstract: A three step seeding process with a hot water rinse and bake includes first contacting the surface of a substrate with a stannous chloride sensitizing solution, followed by a hot water rinse to remove any excess stannous chloride. Next, a palladium chloride activator is used to interact with the stannous compounds to form an adherent layer of metallic palladium particles. Thereafter, the surface is subjected to a palladium chloride/stannous chloride/HCL seeder bath which deposits a final catalytic layer on the surface and drilled through holes to facilitate the electroless plating of a metal of the substrate. A subsequent baking at a temperature between 105.degree. C and 120.degree. C sets the seeder on the substrate surface and in the through holes in the substrate.

Abstract: Multilayer printed circuit boards are formed by providing a plurality of board assemblies having appropriate ground, signal and voltage planes. Each assembly is built around a dimensionally stable core to enhance registration between levels and is processed in such a manner that there exists a relative dimensionally stable configuration when performing method steps important to maintain good registration. The assemblies may constitute a completed multilayer board or may be subsequently combined to provide a more complex multilayer printed circuit board.

Abstract: A method for providing a large number of interconnections between a circuitizable wafer and a circuitizable substrate provides very fine line interconnections with built-in strain relief. A channel between the respective substrates is filled with a solvent soluble material which is applied in a manner such that a convex or concave shape is attained in the channel between the material. A sensitizer may be mixed with the solvent soluble material prior to its placement in the channel between the substrates, and then a photoresist is applied to the composite, exposed and developed, yielding the desired circuit configuration. Next, copper leads are additively electrolessly plated to the desired thickness in the exposed circuit areas. After the leads have been formed, the solvent soluble material is removed leaving curved, strain relief leads suspended in air with the two ends interconnecting the substrates.

Abstract: Dual, slotted reflection plates for a bubble memory package use electrically and thermally conductive plates spaced just far enough apart to accept one or two levels of bubble memory devices between them. Each plate has a plurality of slots therein, each matching the appropriate portions of the coil generating the magnetic field for the bubble memory package.

Abstract: Components, printed circuit board assemblies and the like to be interconnected by soldering are appropriately fluxed and placed in an atmosphere of a saturated vapor derived from a heat transfer liquid medium having a boiling point above the melting point of the solder. The heat transfer medium is chosen to have a solubility parameter compatible with the solubility parameter of the flux to eliminate the need for subsequent flux cleaning.An alternate embodiment includes a fatty acid in the heat transfer medium, which under some circumstances can eliminate the need to apply flux to the assembly being soldered.

Abstract: Apparatus operative in conjunction with a wire routing and bonding machine, or the like, to selectively penetrate a maze of parallel wires on a printed circuit board and expose an area on the board so that additional wires may be suitably bonded to the exposed area. Utilizing the pressure it experiences when contacting the board surface, the apparatus operates to avoid damage to the printed circuit board surface and at the same time has a high reliability for clearing of wires from the selected area.

Abstract: A process for stabilizing printed circuit board substrate or laminate through application of a number of laminate conditioning and baking cycles which function to provide the laminates with dimensional stability. This enables greater control and more precise drilling of the laminates in subsequent fabrication and assembly operations. The dimensional stability for a substrate becomes more critical as the substrate size is increased.

Abstract: A configurated expanse of metal is provided for orientation within a cathode ray tube envelope, attachment thereof being made with the interior surface of the electrical connective button located substantially in the funnel portion of the tube. The metallic expanse is shaped to provide regional shielding of the area involving the traversal button, and effects increased areal contact between the coating disposed on the internal surface of the envelope and the traversal button sealed therein.