Abstract: A method for making a metal oxide semiconductor field effect transistor (MOSFET) is disclosed that results in a semiconductor device structure in which the source and drain regions are buried in the structure beneath a typically thick oxide and bulge out in the semiconductor underneath, but not contiguous with, the interface of a typically thin gate oxide with the semiconductor. This bulging of the buried drain, in an N-channel device, results in an electric field profile during operation which curves away from the interface in the neighborhood of the drain, thereby reducing deleterious transport of electrons from the channel to the gate oxide. The method can also be adapted for fabricating integrated memory cell arrays. This adaptation involves the implantation of one or more layers of dopant ions in the region of the semiconductor between the oxide interface and the bulging portion of the buried drain.

Abstract: An analog electrical signal is converted into a binary digital signal by means of an arrangement of semiconductor surface potential wells. During operation, this arrangement converts the analog electrical signal into an analog signal charge packet in one of these potential wells and sequentially subtracts from this analog packet a sequence of reference charge packets representing the binary digital bits of the analog signal, provided that the then remaining signal charge packet is greater than the reference charge packet.

Abstract: A sensing circuit is disclosed for detecting and amplifying the output signal of a semiconductor charge transfer device, particularly of the transversal filter type containing sensing split-electrodes for sensing the charge packets being transferred through the device. The circuit includes two amplifier means, one of which suppresses the (useless) common mode signal and the other of which detects the (useful) difference signal of the split-electrodes. In addition, the sensing circuit is provided both with "reset" switching means for eliminating spurious signals due to stray charges that accumulate on the sensing electrodes and with "clamping" switching means for eliminating noise of the kTC type generated by the "reset" switching.

Abstract: An on-chip semiconductor pre-filter device is designed with a prescribed low frequency passband (0 to f) and a prescribed stopband (F.+-.f), with a frequency roll-off therebetween. The pre-filter performs a weighted averaging of signal samples taken from an input electrical signal at a suitable sampling frequency and converts the weighted average into an equivalent charge packet for input by injection into a semiconductor charge coupled device (CCD) driven on the same chip by a clock of frequency F. In this way, the "reflected" parts (in band: F.+-.f) of the frequency spectrum of the CCD are suppressed from the input to the CCD, thereby suppressing undesired aliasing in the CCD.

Abstract: A crosspoint (X-Y) matrix array of electrically reprogrammable memory logic elements, such as an array of dual dielectric insulated gate field effect transistor (IGFET) structures, is interconnected in a single electrically reprogrammable diode logic array circuit, both for computing the logic function(s) of many variables and for writing and erasing the function(s). Each logic element's high current path is in series with a separate unidirectional diode in order to prevent sneak paths. Electrical access circuitry is also provided for computing the logic function(s) of many variables, each funtion being electrically alterable.

Abstract: Improved atomic beam deflection and improved isotope separation, even in vapors, is proposed by substituting the A.C. Stark effect for the baseband chirp of the pushing beam in the prior proposal by I. Nebenzahl et al, Applied Physics Letters, Vol. 25, page 327 (September 1974). The efficiency inherent in re-using the photons as in the Nebenzahl et al proposal is retained; but the external frequency chirpers are avoided. The entire process is performed by two pulses of monochromatic coherent light, thereby avoiding the complication of amplifying frequency-modulated light pulses. The A.C. Stark effect is provided by the second beam of coherent monochromatic light, which is sufficiently intense to chirp the energy levels of the atoms or isotopes of the atomic beam or vapor. Although, in general, the A.C. Stark effect will alter the isotope shift somewhat, it is not eliminated.

Abstract: An ordered array of semiconductor integrated circuit feedback delay type of phase-locked recursive oscillators is arranged to furnish a correspondingly ordered discrete spectrum of mutually different resonant frequencies. The individual feedback path in each of the oscillators contains a semiconductor charge transfer device for providing most of the feedback delay. The total feedback delay in each of the oscillators is fine-tuned in the feedback path of each oscillator by a different incremental time delay element, such as an RC time delay element, which introduces an added delay that is less than that of a single transfer cycle in the charge transfer device. A phase-locking signal is fed to every oscillator, all the locking signals being derived from, and thus coherent with, a single master clock. All of the charge transfer devices are driven by a single clock pulse train whose timing can also be advantageously controlled by the master clock.

Abstract: This invention involves a memory cell of, for example, the metal-oxide-semiconductor (MOS) capacitor type, which is accessed for reading and writing by means of an access network connected to the memory cell through a gating transistor, and which is provided with an independent refresh network for maintaining the memory state of the cell in the absence of an access writing signal. The refresh network includes a pair of IGFET (Insulated Gate Field-Effect Transistors) transistors connected between the MOS capacitor and an AC refresh line which is completely independent of the electrical access network. Either a "full" or "empty" capacitor memory state, binary digital 1 or 0, respectively, is maintained without the need for interrupting the reading and writing of the MOS capacitor through the gating transistor.

Abstract: In a channel electron multiplier device for detecting low level illumination optical image patterns, the output pattern of electrons is detected by an XY array of metal plates which are randomly accessed for readout by a corresponding row-column (XY) array of dual-gated insulated gate field effect transistors in an integrated circuit type of configuration. More specifically, each metal plate is located in the path of several (typically, ten or more) individual electron multiplier channels, in order to store the electrons emerging from these channels. The plates are all situated on the exposed surface of an insulating layer on a major surface of a semiconductor wafer. Each plate is connected through a different aperture in the insulating layer to a different localized source region of a different dual-gated insulated gate field effect transistor whose gate region is controlled by XY access control bus electrodes.

Abstract: A semiconductor charge transfer device (CTD) has an input network which includes an added gate region held at constant voltage, the added gate region being located between an input semiconductor charge injection region (input diode) and a signal gate region. In this way the amount of signal charge transferred into the CTD is less sensitive to unavoidable noise in the clock voltages which are applied to electrodes associated with the bulk of the CTD for the purpose of shifting the signal charge therethrough; and the linearity of the ratio of injected charge to signal voltage is also improved.

Abstract: In order to use a flip-flop amplifier for regenerative sensing of the binary output stream of a many-stage main semiconductor charge transfer device section, an auxiliary semiconductor charge transfer device section of but a few or a single transfer stage is fabricated in close proximity of the output diode of the main semiconductor charge transfer device section. This auxiliary charge transfer device section is arranged to provide an output stream of unilevel charge packets which are midway between the binary charge levels of the output stream in the main semiconductor charge transfer device section.

Abstract: This invention furnishes a semiconductor shift register circuit characterized in that each stage of the register contains a dynamic "master" portion feeding a static "slave" portion. The register circuit is driven by a suitable clock voltage circuit such that if the signal source for the clock circuit should stop, then the information in each stage is retained and is stored in the static portion. In this way, the overall performance of the shift register is static in the sense that the information in the register is not lost during temporary stoppage of the driving clock; yet, fewer electrical component elements are required per entire stage than in the case of a fully static stage.