Patents Represented by Attorney D. Kendall Cooper
  • Patent number: 4811240
    Abstract: A Graphic Development Instrument System (GDIS) provides a method and capability to design, create and update display screens, including static elements (never change) and dynamic elements (change responsive to stimuli) and is able to include any controller function, without rewriting or modifyng the software. The GDIS enables a screen designer to create EPROMS for those screens for different for example vehicles or models.
    Type: Grant
    Filed: December 22, 1986
    Date of Patent: March 7, 1989
    Assignee: International Business Machines Corporation
    Inventors: Richard Ballou, Stanley M. Belyeu, Joseph A. Boscove, Hobart L. Kurtz, Peter Langer, Andrew B. McNeill, Bernard M. Reid, Herman Rodriguez
  • Patent number: 4796206
    Abstract: A computer based technician terminal is connected to a vehicle being serviced using an assembly line data link (ALDL) connection from an on-board computer. The data link provides status information and fault codes. The technician is led through various procedures. During set up, the technician connects an ALDL cable from the terminal to the vehicle, the vehicle indentification number (VIN) is entered and vehicle options are identified. A fault detection procedure (FDP) in the terminal detects vehicle malfunctions by interrogating data received (via the ALDL) from the on-board computer. A fault analysis procedure (FAP), using the fault codes from a table as arguments, does a sequential compare against the contents of a fault analysis table containing fault codes. In a fault sequencing procedure (FSP), for each fault code passed by the FAP, there is a list containing the name(s) of one or more isolation procedures.
    Type: Grant
    Filed: June 2, 1986
    Date of Patent: January 3, 1989
    Assignee: International Business Machines Corporation
    Inventors: Joseph A. Boscove, Hobart L. Kurtz, Jeffrey E. Prince, William P. Wiegand
  • Patent number: 4672536
    Abstract: An arbitration method and device for a data processing system wherein N units share a common resource, to allocate the shared resource to a given unit selected from a number of units requesting access thereto.An age value is assigned to each unit and corresponds to the age of the request that will be made by the unit. During an arbitration cycle, a unit whose request will be serviced, if the shared resource becomes available, is selected, this unit being the one whose request has an age value corresponding to the oldest request. Then, the age value associated with each unit is updated when the resource is available, the age of the selected unit assuming a value corresponding to that of the most recent request, the ages of the units not selected that correspond to requests more recent than the one made by the selected unit being increased by a given quantity, and the ages of the units not selected that correspond to requests older than the one made by the selected unit remaining unchanged.
    Type: Grant
    Filed: March 26, 1984
    Date of Patent: June 9, 1987
    Assignee: International Business Machines Corporation
    Inventors: Didier Giroir, Gerard Lacoste
  • Patent number: 4558447
    Abstract: Self-test techniques for checking driver circuits connected to a bus are described that particularly involve the detection and isolation of failures in off-chip-drivers and connections.
    Type: Grant
    Filed: February 28, 1983
    Date of Patent: December 10, 1985
    Assignee: International Business Machines Corporation
    Inventors: Joseph W. Freeman, Wayne R. Kraft, Hobart L. Kurtz, Israel B. Magrisso
  • Patent number: 4535467
    Abstract: A Level Sensitive Scan Design (LSSD) Shift Register Latch pair implemented in current switch logic is disclosed. The arrangement is characterized by the logic used to control the L1 and L2 latches being implemented in Differential Cascode Current Switch logic and the L1/L2 latches being coupled to only one current source. A "merged" L1/L2 latch arrangement employing only one current source is provided for an LSSD testing environment.
    Type: Grant
    Filed: November 30, 1982
    Date of Patent: August 13, 1985
    Assignee: International Business Machines Corporation
    Inventors: James W. Davis, Joel C. Leininger, Carlos Munoz-Bustamante, Gordon J. Robbins
  • Patent number: 4513283
    Abstract: Latch circuits implemented in multiple level Cascode Current Switch logic for performing various complex latch functions including Level Sensitive Scan Design (LSSD) testing and implementable in VLSI technology are described.
    Type: Grant
    Filed: November 30, 1982
    Date of Patent: April 23, 1985
    Assignee: International Business Machines Corporation
    Inventor: Joel C. Leininger
  • Patent number: 4508204
    Abstract: A chute for gravity feeding a plurality of like electrical components (1) to a pick-up station of a robotic controlled automatic assembly system comprises guide rails (2,3) down which components slide with their pins (13) extending between the rails. The rails are shaped to provide a downwardly inclined straight track (5) leading into a horizontal track (6) comprising the pick-up station from which the components are taken by the robot. The transition from the inclined track (approximately 30 degrees to the horizontal) to the straight track, although smooth, is quite abrupt and ensures that the next component is successfully fed from the inclined to the horizontal section of the chute each time its predecessor is removed from the pick-up station. Since the length of the horizontal track is such that only one component can be accommodated at a time, accurate positioning of the component in the pick-up station for access by the robot is guaranteed.
    Type: Grant
    Filed: November 14, 1983
    Date of Patent: April 2, 1985
    Assignee: International Business Machines Corporation
    Inventors: David MacWilliams, Leonard J. Rigbey
  • Patent number: 4502100
    Abstract: A cooling system is described for modules on electronic circuit cards, the system typically containing a multiplicity of cards. Improved cooling is achieved due to improved boundary layer conditions established by counter air flow in opposite directions on opposite sides of the cards.
    Type: Grant
    Filed: November 24, 1982
    Date of Patent: February 26, 1985
    Assignee: International Business Machines Corporation
    Inventors: Stephen B. Greenspan, Omkarnath R. Gupta
  • Patent number: 4452136
    Abstract: A printer subsystem is interconnected with a host system from which it receives command and data information and to which it provides status information. The printer subsystem has two microprocessors, one of which communicates with the host system for transfer of command, data, and status signals and the other of which directly controls the printer unit in the subsystem especially with respect to the print assembly, forms feed assembly, ribbon drive assembly, and print wire actuators.
    Type: Grant
    Filed: October 19, 1979
    Date of Patent: June 5, 1984
    Assignee: International Business Machines Corporation
    Inventors: William W. Boynton, Charles J. Weber
  • Patent number: 4418383
    Abstract: A Large Scale Integration (LSI) data flow component is described for use as a building block, the component being capable of use singly or in combination to provide data flow paths and functions of different data widths for a processor or microprocessor. A component with an eight-bit data flow is described as a "byte slice", wherein individual byte control is provided within a multiple-byte configuration so that single data flow components within the group can operate independently of other components under control of external logic. Components may operate on a stand-alone, a multiple-byte, or nonactive-byte basis. A control scheme permits functions of one component to be influenced by actions or logic of another component to permit efficient implementation of arithmetic algorithms.
    Type: Grant
    Filed: June 30, 1980
    Date of Patent: November 29, 1983
    Assignee: International Business Machines Corporation
    Inventors: Donald E. Doyle, George A. Hellwarth, Jack L. Quanstrom
  • Patent number: 4374429
    Abstract: An information transfer system is described that includes a central processing unit (CPU) interconnected with a peripheral device such as an operator console by an interface bus of finite capacity. Transfer of information in the system is normally in a preferred direction from the CPU to the console. Provision is made to transfer information concerning key depressions on the console from the console to the CPU without using the bus by utilizing a normally continuously operating counter in the CPU that provides a sequence of coded count signals representative of individual keys that are provided on the console and that may be depressed. A comparator in the console compares coded count signals from the CPU counter with coded signals from the console representative of actual key depressions and provides a stop signal to the CPU counter via a single control line when an equal compare of the CPU counter and console coded signals occurs.
    Type: Grant
    Filed: June 27, 1980
    Date of Patent: February 15, 1983
    Assignee: International Business Machines Corporation
    Inventors: Jack W. Cannon, Bradley D. Herrman, Ramiro Ramirez, Jr.
  • Patent number: 4363093
    Abstract: A processor intercommunication system includes a plurality of stations which are interconnected by a transmission link, each station having an associated processor. Further, each station comprises means which provide a data link protocol mechanism for establishing and maintaining a multiplicity of logical connections or transfer sessions between the station and several other stations. Thus application programs of all kinds in the processors can communicate with programs or data files in remote processors and need not be involved in communication operations which are handled by the stations. Link access circuitry is provided also in each station for absorbing the physical and topological characteristics of the transmission link so that the data protocol circuitry establishing and maintaining logical connections is independent of these characteristics.
    Type: Grant
    Filed: March 10, 1980
    Date of Patent: December 7, 1982
    Assignee: International Business Machines Corporation
    Inventors: Michael I. Davis, Daniel T. W. Sze
  • Patent number: 4353653
    Abstract: A printer subsystem receives command and data information from a host system and retains a large number of font images in an associated storage area within the printer subsystem. A base font image set is ordinarily selected by the user but provision is made to dynamically change the font images as may be required in a real time fashion during actual printing operations. The font images are stored in a compressed form in the storage area. Routines involve use of pointer tables and data tables. It is possible to select an entire set of new font images in place of the base set of images or to modify only selected character images within the base font image set.
    Type: Grant
    Filed: October 19, 1979
    Date of Patent: October 12, 1982
    Assignee: International Business Machines Corporation
    Inventor: Lee T. Zimmerman
  • Patent number: 4354229
    Abstract: In a loop-structured communication system interconnecting a plurality of data processors without central controller, stations comprise modems which can start loop operation and achieve synchronous frame transmission around the loop through all participating stations.In an initialization procedure after system start or after loss of frame synchronization on the loop, modems select a temporary master station.The temporary master will adapt total loop delay to be an integer multiple of the basic frame period, and will transmit available frames. All active modems adapt their timing to the circulating stream of frames until the whole loop and all participating stations are synchronized.Synchronization conditions are continuously monitored in all stations to start resynchronization or initialization procedures if necessary. In a specific arrangement, the location of a loop failure which prevents establishment of synchronization can be determined.
    Type: Grant
    Filed: March 10, 1980
    Date of Patent: October 12, 1982
    Assignee: International Business Machines Corporation
    Inventors: Jonathan B. Davis, Charles S. Lanier, Daniel T. W. Sze, Leonard Weiss
  • Patent number: 4353298
    Abstract: A printer is provided with facilities for increasing the printing throughput. This involves a partial line turnaround operation. The printer has means to move a form or document past a print line, a ribbon drive assembly, and a print assembly incorporating a plurality of print wires arranged in print head groups, each group comprising a predetermined number of print wires. If, as an example, the print assembly has two, four, six, or eight print heads, each can accommodate eight wires in the embodiment described. The print wires are arranged in a slanted serrated pattern and provision is made herein to insure that the print heads move at least far enough to print their assigned character locations prior to the performance of any turnaround in individual lines being printed. Routine involves the accessing of tables stored in conjunction with a microprocessor, the tables indicating the optimum turnaround situations for the different print head configurations.
    Type: Grant
    Filed: October 19, 1979
    Date of Patent: October 12, 1982
    Assignee: International Business Machines Corporation
    Inventors: Gregory N. Baker, Willard B. Greene, Ludwig R. Siegl, Delbert C. Thomas, Jr., Charles J. Weber, Lee T. Zimmerman
  • Patent number: 4346474
    Abstract: A synchronous data transmission system between remote stations is shown wherein data is transmitted parallel by bit serial by group over a plurality of parallel lines extending between sending and receiving stations. A parity line is also included in the transmission system for checking errors and a clock line is included for synchronization of the parallel data being transmitted. Information is transmitted from one station to another with alternating even and odd parity for succeeding groups of parallel data. The information is checked at the receiving station for even-even or odd-odd parity in succeeding groups of data. Longitudinal redundancy checking (LRC) is also added to the checking at a receiving station. The combination of the even and odd parity checking and the LRC checking provides a level of data transmission error checking which is almost as effective in finding errors as a far more costly CRC checking mechanism.
    Type: Grant
    Filed: July 3, 1980
    Date of Patent: August 24, 1982
    Assignee: International Business Machines Corporation
    Inventor: Daniel T. W. Sze
  • Patent number: 4335426
    Abstract: For a system including a plurality of processors which are interconnected by a communications link through individual communication stations, a method of remote processor initialization is disclosed which provides a specific frame exchange procedure for the transmission of initial program load data from a source processor to an acceptor processor.All stations are basically equal. Provision is made in each station to automatically generate a Request Initialization Frame under certain conditions when the attached processor is an acceptor, and for transmitting initial program data transfer frames between a start and a termination frame, when the attached processor is a source. Each station can be set to indicate the type of the attached processor, and to handle initialization frames appropriately.
    Type: Grant
    Filed: March 10, 1980
    Date of Patent: June 15, 1982
    Assignee: International Business Machines Corporation
    Inventors: Hiram M. Maxwell, Roger E. McKay, Niconedi P. Nacheber, Jr., Daniel T. Sze
  • Patent number: 4313683
    Abstract: A microcomputer controls a ribbon drive assembly in a high speed wire matrix printer to eliminte ribbon slack, to insure proper ribbon positioning and to conduct diagnostics in conjunction with turning on the printer such as start-up time each day and after replacement of the ribbon with a new ribbon, the diagnostics checking to be sure that a ribbon is actually in the proper position, that it is threaded across the print line and also checking for proper operation of the ribbon drive, logic, and electronics. Tests are also made for proper ribbon drive during normal ribbon feeding operations.
    Type: Grant
    Filed: October 19, 1979
    Date of Patent: February 2, 1982
    Assignee: International Business Machines Corporation
    Inventors: Earl T. Brown, Barry R. Cavill
  • Patent number: 4313161
    Abstract: A system is provided that includes a plurality of processors connected to a shared storage via an asynchronous storage interface that includes various interface logic and a ring counter that performs polling of the processors for access to the shared storage. The ring utilizes a "lookahead" feature that bypasses stages in the ring to speed up responses to request signals from the processor. The logic uses the clock from the particular processor accessing the shared memory at any point in time.
    Type: Grant
    Filed: November 13, 1979
    Date of Patent: January 26, 1982
    Assignee: International Business Machines Corporation
    Inventors: Dick K. Hardin, Frederic J. Puttlitz
  • Patent number: 4304497
    Abstract: A data processing system or printer subsystem is provided with facilities for detecting emitter changes that have occurred during operating intervals. In a typical operation, a microprocessor initiates a command to a moving assembly, such as a forms feed assembly, then once the operation is initiated the microprocessor transfers to other program responsibilities, meanwhile periodically checking the status of the forms feed assembly. The forms feed assembly supplies emitter signals to the processor which are utilized by the microprocessor to determine whether or not any emitter changes have occurred during the intervals between the checking operations. The microprocessor has a stored data table and logic responsive to emitter signal conditions that had previously occurred (WAS) and that is further responsive to emitter signals that are presently occurring (IS) to supply an output in numbers of emitters indicative of both the extent and direction of movement of the assembly during the intervening interval.
    Type: Grant
    Filed: October 19, 1979
    Date of Patent: December 8, 1981
    Assignee: International Business Machines Corporation
    Inventors: Barry R. Cavill, Robert B. Steup