Patents Represented by Attorney, Agent or Law Firm Danamuraj & Youst, P.C.
  • Patent number: 6822469
    Abstract: The present invention provides a system, method and apparatus for testing multiple semiconductor wafers. The method includes the steps of attaching two or more wafer-interposer assemblies to a testing apparatus and testing each semiconductor die. Each wafer-interposer assembly comprises an interposer connected to one of the semiconductor wafers and each semiconductor wafer includes one or more semiconductor die. The present invention also provides a test fixture rack having a test fixture backbone, two or more wafer-interposer connectors attached to the test fixture backbone, and one or more connectors attached to the test fixture backbone and electrically coupled to the two or more wafer-interposer connectors such that each semiconductor die can be addressed and tested using the one or more connectors. Each wafer-interposer connector is designed to receive a wafer-interposer assembly having an interposer connected to one of the semiconductor wafers.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: November 23, 2004
    Assignee: Eaglestone Partners I, LLC
    Inventor: Jerry D. Kline