Abstract: A data processor in accordance with the present invention makes it possible to perform pre-branch processing with respect to a return address in the initial stage of pipeline processing also on a subroutine return instruction, and therefore by providing a stack memory (PC stack) dedicated to a program counter (PC) for storing only return addresses of the subroutine return instruction, in executing a subroutine call instruction in an execution stage of a pipeline processing mechanism, the return address from the subroutine is pushed to the PC stack, and the pre-branch processing is performed to the address popped from the PC stack in decoding the subroutine return instruction in an instruction decoding stage.

Abstract: The present invention provides a processing system for coupling to an infrastructure of a building. The processing system comprises a processor having a plurality of processing system elements. A tray is coupled to the processor and the tray has at least one pivotal attachment member coupled to an articulating arm. A motor is coupled to a portion of the infrastructure and the articulating arm so that the motor may move the processing system between a first position and a second position.