Abstract: The teaching discloses a dual bidirectional minimum volume self-centering air tract system for transporting semiconductor wafers or geometrically similar parts-in-process to and from processing tool stations in a random type manner and embodying controls to identify and collect treated wafers in segregated lots. The enclosed system is at a positive pressure to avoid ambient contamination. The enclosed track system further embodies a device for the combined computerized control of individual wafer routing in the system, humidity, temperature, and particulate content of the fluid within and utilized by the transport system while supplying and receiving wafers to processing tool stations which may have a wide variation of ambient conditions.

Abstract: Disclosed is a method in the manufacture of FET single device memory cells and arrays for controlling a doped oxide diffusion profile and thereby controlling substrate diffusion and doped oxide diffusion source overlap and controlling the inherent formation of parasitic capacitance. This is accomplished by controlling the variation of four interrelated essential parameters in the production of a single device memory cell array with the consequent result of minimizing said parasitic capacitance encountered in certain overlap conditions and thereby maintaining and increasing device performance. Process conditions which are controlled relative to one another are the thickness of the doped oxide on a monocrystalline semiconductor silicon substrate, the amount of over etch carried out in the formation of a diffusion source island, the thickness of oxide formed on unprotected substrate areas during diffusion drive-in, and the depth of a particular diffusion into the substrate, known as X.sub.j.

Abstract: Disclosed is an improved method for manufacturing semiconductor integrated circuitry whereby interconnection pad limiting metallurgy and read only fusible link memory structure is simultaneously formed by first blank depositing a composite metal film followed by in situ forming pad metallurgy and said read only link structure utilizing photoresist and etch techniques. Said read only memory link structure is utilized for directing the use of redundant lines in place of defective array bits.