Abstract: A stack that includes non-volatile memory devices is disclosed. One of the non-volatile memory devices in the stack is a master device, and the remaining memory device or devices is a slave device(s).
Abstract: A stack that includes non-volatile memory devices is disclosed. One of the non-volatile memory devices in the stack is a master device, and the remaining memory device or devices is a slave device(s).
Abstract: A memory system circuit and method therefor are disclosed. The circuit is adapted to detect a transition in a data timing signal from an indeterminate logic level to a selected one of a high logic level and a low logic level. The circuit includes a comparator having a first input, a second input and an output. The first and second inputs receive the data timing signal and a reference voltage respectively. The output changes logic levels in response to a change in polarity of a voltage difference between the voltage of the timing signal and the reference voltage. The reference voltage is sufficiently closer to the selected one of the logic levels as compared to the other of the logic levels so as to at least substantially prevent potential false positive detections.
Abstract: A matchline sense circuit for detecting a rising voltage on a matchline of a CAM array is disclosed. The circuit initially precharges a matchline to ground before turning on a current source to supply current to the matchline and raise the voltage of the matchline. A reference matchline sense circuit generates a self-timed control signal to keep the current supply turned on for a predetermined duration of time. Sensed data on the matchlines are latched after the current source is turned off and the matchlines are precharged to ground. Because the matchline sense circuit of the present invention precharges the matchlines to ground instead of the supply voltage, VDD, less power is consumed. By sensing the rise of the matchline voltage to an n-channel transistor threshold potential, the matchline sensing operation speed is increased.
Type:
Grant
Filed:
July 9, 2007
Date of Patent:
June 3, 2008
Assignee:
MOSAID Technologies Incorporated
Inventors:
Stanley Jeh-Chun Ma, Peter P. Ma, Valerie Lines, Peter Gillingham, Robert McKenzie, Abdullah Ahmed