Abstract: A floating point result in a processor is efficiently normalized by predicting the mantissa shift required to normalize the result to an error of one bit position in one direction, resulting in minimum and maximum predicted shifts. Concurrently with an addition of operands to generate a result mantissa, an inversion of the minimum predicted shift is added to the operand exponent to generate an intermediate exponent corresponding to a maximum predicted shift. When the operand addition is complete, the result mantissa is partially shifted in response to the minimum predicted shift. The location of the leading one is then ascertained and compared to the remaining minimum predicted shift. If the minimum predicted shift is the actual shift required to normalize the result, the result mantissa is further shifted by the remaining minimum predicted shift and an exponent carry-in is asserted.