Abstract: A method of testing a semiconductor circuit, the semiconductor circuit including word lines connected to a storage device, address receivers receiving addresses, an address decoder decoding the addresses and selecting ones of the word lines, a self-refresh unit refreshing the word lines during a non-test mode and a test mode device controlling the semiconductor circuit in a test mode, the method comprises supplying a test mode signal to the test mode device, activating a test mode operation of the self-refresh unit, sequentially activating the word lines using the self-refresh unit, maintaining the word lines in an active condition for a predetermined time period and deactivating the word lines.
Type:
Grant
Filed:
August 3, 1998
Date of Patent:
May 23, 2000
Assignees:
International Business Machines Corporation, Infineon Technologies North America Corp.