Patents Represented by Attorney David A. Frank

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  • Embroidery sewing machine hooping device
    Patent number: 7624693
    Abstract: An embroidery sewing machine hooping device has an attachment bracket attached to a base formed to suit each size and shape of machine embroidery hoop. The base provides a stable platform while hooping material and is equipped with a non-skid or non-slip material limiting side-to-side slippage when hooping materials.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: December 1, 2009
    Inventor: David F. Fabec
  • Processor for input-output processing system
    Patent number: 3976977
    Abstract: An input-output processing system (IOPS) which performs both the communication and control functions in a large scale data processing system is disclosed. By relieving the main data processor of these functions more efficient use of the entire system is made possible. The IOPS includes a processor to develop addresses for a paged memory and institute execution of input-output command sequences.
    Type: Grant
    Filed: March 26, 1975
    Date of Patent: August 24, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventors: Marion G. Porter, Garvin Wesley Patterson, William A. Shelly, Nicolas S. Lemak
  • Switching regulator employing biased saturable core reactors
    Patent number: 3971975
    Abstract: A switching regulator for high current, low voltage applications includes at least one pair of biased saturable core transformers to achieve improved duty-cycle and reduced rectifier currents. Advantageously, a single bias choke may be employed with a plurality of transformer pairs.
    Type: Grant
    Filed: June 26, 1975
    Date of Patent: July 27, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Luther L. Genuit
  • Data alignment circuit
    Patent number: 3967101
    Abstract: A data alignment circuit employs a plurality of data selector circuits with each of the data selector circuits including means for receiving a plurality of data bits and control means for selecting one of the bits as an output. Each of the input bits may be connected to respective successive data selector circuits, and the control means of the data selector circuits are interconnected whereby one bit of each data selector circuit is provided in a plural bit output.
    Type: Grant
    Filed: March 17, 1975
    Date of Patent: June 29, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Darrell L. Fett
  • Current mode binary/BCD arithmetic array
    Patent number: 3958112
    Abstract: An arithmetic logic array employing soft-saturating current mode logic gates operates on pure binary data or binary coded decimal data. Two 4-bit data inputs are received along with a 5-bit Op code, a carry input, and decimal arithmetic operation signals. In response to a decimal add (DA) one data input is increased by a count of six, and in response to either a BCD add or a BCD subtract (DA + DS) the output is decreased by a count of six if no carry output is generated.
    Type: Grant
    Filed: May 9, 1975
    Date of Patent: May 18, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Homer W. Miller
  • Input-output system having cyclical scanning of interrupt requests
    Patent number: 3949371
    Abstract: A system is disclosed for controlling access to a central information processor by a plurality of peripheral devices. The system determines access on the basis of a (1) predetermined hierarchical priority order and (2) a cyclical scanning process. To achieve this, a system of hierarchically organized priority levels is combined with a system of cyclical scanning in a manner such that no single device may monopolize the central processor.
    Type: Grant
    Filed: August 7, 1974
    Date of Patent: April 6, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Renzo Pederzini
  • System for extending the interior decor of a microprogrammed computer
    Patent number: 3949372
    Abstract: The system discriminates between "allowed" and "forbidden" machine instructions by interpreting coded digital words found in an auxiliary memory. "Allowed" instructions found in the microprogramming memory are directly executed. "Forbidden" instructions lead to the execution of exception routines, which determine if the instruction is an "additional" instruction which has a microprogram for its execution in working memory. If so, working memory is accessed and the machine instruction is executed.
    Type: Grant
    Filed: October 2, 1974
    Date of Patent: April 6, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Antonio Brioschi