Patents Represented by Attorney, Agent or Law Firm David Larwood
  • Patent number: 6336269
    Abstract: Contact structures formed on an electronic component are useful for connecting the component to other electronic components. A contact tip structure can be formed on a sacrificial substrate, then combined with an interconnection element. A preferred contact structure includes some topography, generally in the form of certain raised features. These are formed by embossing depressed features into the sacrificial substrate upon which the contact tip structure is constructed. The contact tip structure can be optimized for making contact with another electrical component.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: January 8, 2002
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 6307161
    Abstract: Elongate contact structures (interconnection elements) are (formed on electronic components by bonding one (proximal) end of a core element to a terminal of the electronic component and applying a metallic material over the end portion of the core element. The metallic material may also cover a distal end portion of the core element. A central portion of the core element is not covered by the metallic material, but is preferably covered by a masking (insulating) material.
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: October 23, 2001
    Assignee: FormFactor, Inc.
    Inventors: Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 6232149
    Abstract: Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally urging terminals of an interconnection substrate against end portions of the spring contact elements. A variety of terminal configurations are disclosed.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: May 15, 2001
    Assignee: FormFactor, Inc.
    Inventors: Thomas H. Dozier, II, Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu, David V. Pedersen, Michael A. Stadt
  • Patent number: 6184587
    Abstract: An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The contact structure includes an internal flexible elongate member having first and second ends and with the first end forming a first intimate bond to the surface of said conductive contact terminal without the use of a separate bonding material. An electrically conductive shell is provided and is formed of at least one layer of a conductive material enveloping the elongate member and forming a second intimate bond with at least a portion of the conductive contact terminal immediately adjacent the first intimate bond.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: February 6, 2001
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, Gaetar L. Mathieu
  • Patent number: 6184053
    Abstract: Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined in masking layers deposited on a surface of a substrate which may be an electronic component such as an active semiconductor device. Each spring contact element has a base end, a contact end, and a central body portion. The contact end is offset in the z-axis (at a different height) and in at least one of the x and y directions from the base end. In this manner, a plurality of spring contact elements are fabricated in a prescribed spatial relationship with one another on the substrate. The spring contact elements make temporary (i.e., pressure) or permanent (e.g., joined by soldering or brazing or with a conductive adhesive) connections with terminals of another electronic component to effect electrical connections therebetween.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: February 6, 2001
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Igor Y. Khandros, Gaetan L. Mathieu, David V. Pedersen
  • Patent number: 6168974
    Abstract: A process for providing a plurality free-standing resilient contact structures (spring elements) mounted to a surface of a carrier substrate. The carrier substrate is mounted to a surface of a semiconductor device, or one or more unsingulated semiconductor dies. Bond pads of the semiconductor device are connected to the spring elements by bond wires extending between the bond pads and terminals associated with the spring elements. The carrier substrate is mounted to one or more semiconductor devices prior to the semiconductor devices being singulated from a semiconductor wafer upon which they are formed Resilience and compliance to effect pressure connections to the semiconductor device are provided by the spring elements extending from the carrier substrate, per se.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: January 2, 2001
    Assignee: FormFactor, Inc.
    Inventors: Sung Chul Chang, Igor Y. Khandros, William D. Smith
  • Patent number: 6150186
    Abstract: Deposition of metal in a preferred shape, including coatings on parts, or stand-alone materials, and subsequent heat treatment to provide improved mechanical properties. In particular, the method gives products with relatively high yield strength. The products often have relatively high elastic modulus, and are thermally stable, maintaining the high yield strength at temperatures considerably above 25.degree. C. This technique involves depositing a material in the presence of a selected additive, and then subjecting the deposited material to a moderate heat treatment. This moderate heat treatment differs from other commonly employed "stress relief" heat treatments in using lower temperatures and/or shorter times, preferably just enough to reorganize the material to the new, desired form. Coating a shape and heat treating provides a shaped deposit with improved material properties.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: November 21, 2000
    Assignee: FormFactor, Inc.
    Inventors: Jimmy Kuo-Wei Chen, Benjamin N. Eldridge, Thomas H. Dozier, Junjye J. Yeh, Gayle J. Herman
  • Patent number: 6064213
    Abstract: Wafer-level burn-in and test of semiconductor devices under test (DUTs) includes a test substrate having active electronic components (e.g. ASICs) secured to an interconnection substrate, spring contact elements effecting interconnections between the ASICs and the DUTs. This is advantageously performed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly lower than the burn-in temperature of the DUTs. The spring contact elements may be mounted to either the DUTs or to the ASICs. The spring contact elements may fan out to relax tolerance constraints on aligning and interconnecting the ASICs and the DUTs.
    Type: Grant
    Filed: January 15, 1997
    Date of Patent: May 16, 2000
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, David V. Pedersen
  • Patent number: 6049976
    Abstract: A method for manufacturing raised contacts on the surface of an electronic component includes bonding one end of a wire to an area, such as a terminal, of the electronic component, and shaping the wire into a wire stem configuration (including straight, bent two-dimensionally, bent three-dimensionally). A coating, having one or more layers, is deposited on the wire stem to (i) impart resilient mechanical characteristics to the shaped wire stem and (ii) more securely attach ("anchor") the wire stem to the terminal. Gold is one of several materials described that may be selected for the wire stem. A variety of materials for the coating, and their mechanical properties, are described. The wire stems may be shaped as loops, for example originating and terminating on the same terminal of the electronic component, and overcoated with solder. The use of a barrier layer to prevent unwanted reactions between the wire stem and its environment (e.g., with a solder overcoat) is described.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: April 18, 2000
    Assignee: FormFactor, Inc.
    Inventor: Igor Y. Khandros
  • Patent number: 6050829
    Abstract: By segregating at least a substantial portion of the power connections to the space transformer component (506, 700, 800) from the signal connections thereto, constraints on the interposer component (504) may be relaxed. This is particularly advantageous in the context of probing one or more high power semiconductor components. The technique of the present invention provides for a plurality of signals (including power and ground) to be inserted into an electronic component such as a space transformer both from a one main surface thereof and an edge (periphery) thereof to an opposite main surface thereof. The space transformer includes pads (522, 706, 810) for engaging, by means of spring elements (524), component (508) to be tested and includes exposed edge pads (750, 804, 854) for engagement by a flexible cable (752) for transmission of power and ground signals to the space transformer.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: April 18, 2000
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 6043563
    Abstract: Spring contact elements are fabricated at areas on an electronic component remote from terminals to which they are electrically connected. For example, the spring contact elements may be mounted to remote regions such as distal ends of extended tails (conductive lines) which extend from a terminal of an electronic component to positions which are remote from the terminals. In this manner, a plurality of substantially identical spring contact elements can be mounted to the component so that their free (distal) ends are disposed in a pattern and at positions which are spatially-translated from the pattern of the terminals on the component. The spring contact elements include, but are not limited to, composite interconnection elements and plated-up structures. The electronic component includes, but is not limited to, a semiconductor device, a memory chip, a portion of a semiconductor wafer, a space transformer, a probe card, a chip carrier, and a socket.
    Type: Grant
    Filed: October 20, 1997
    Date of Patent: March 28, 2000
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Igor Y. Khandros, Gaetan L. Mathieu, David V. Pedersen
  • Patent number: 6032356
    Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150.degree. C., and can be completed in less than 60 minutes.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: March 7, 2000
    Assignee: FormFactor. Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 6033935
    Abstract: Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally urging terminals of an interconnection substrate against end portions of the spring contact elements. A variety of terminal configurations are disclosed.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: March 7, 2000
    Assignee: FormFactor, Inc.
    Inventors: Thomas H. Dozier, II, Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu, David V. Pedersen, Michael A. Stadt
  • Patent number: 6023103
    Abstract: A plurality of free-standing resilient contact structures (spring elements) are mounted to a surface of a carrier substrate. The carrier substrate is mounted to a surface of a semiconductor device, or one or more unsingulated semiconductor dies. Bond pads of the semiconductor device are connected to the spring elements by bond wires extending between the bond pads and terminals associated with the spring elements. The carrier substrate is mounted to one or more semiconductor devices prior to the semiconductor devices being singulated from a semiconductor wafer upon which they are formed. Resilience and compliance to effect pressure connections to the semiconductor device are provided by the spring elements extending from the carrier substrate, per se. The carrier substrate is pre-fabricated, by mounting the spring elements thereto prior to mounting the carrier substrate to the semiconductor device(s), or vice-versa.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: February 8, 2000
    Assignee: FormFactor, Inc.
    Inventors: Sung Chul Chang, Igor Y. Khandros, William D. Smith
  • Patent number: 5998228
    Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150.degree. C., and can be completed in less than 60 minutes.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: December 7, 1999
    Assignee: Form Factor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 5998864
    Abstract: High density packaging of semiconductor devices on an interconnection substrate is achieved by stacking bare semiconductor devices atop one another so that an edge portion of a semiconductor device extends beyond the semiconductor device that it is stacked atop. Elongate interconnection elements extend from the bottommost one of the semiconductor devices, and from the exposed edge portions of the semiconductor devices stacked atop the bottommost semiconductor device. Free-ends of the elongate interconnection elements make electrical contact with terminals of an interconnection substrate, such as a PCB. The elongate interconnection elements extending from each of the semiconductor devices are sized so as to reach the terminals of the PCB, which may be plated through holes. The elongate interconnection elements are suitably resilient contact structures, and may be composite interconnection elements comprising a relatively soft core (e.g., a gold wire) and a relatively hard overcoat (e.g., a nickel plating).
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: December 7, 1999
    Assignee: Formfactor, Inc.
    Inventors: Igor Y. Khandros, David V. Pedersen
  • Patent number: 5983493
    Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150.degree. C., and can be completed in less than 60 minutes.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: November 16, 1999
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 5917707
    Abstract: An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The contact structure includes an internal flexible elongate member having first and second ends and with the first end forming a first intimate bond to the surface of said conductive contact terminal without the use of a separate bonding material. An electrically conductive shell is provided and is formed of at least one layer of a conductive material enveloping the elongate member and forming a second intimate bond with at least a portion of the conductive contact terminal immediately adjacent the first intimate bond.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: June 29, 1999
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 5912046
    Abstract: A flowable coating material, such as a liquid having solids in suspension, such as spin-on glass, is applied to a surface of an electronic component by placing the component in a centrifuge and spinning the component about a first axis so that the liquid material is forced against the surface of the component. The component may also be rotated about its own axis so that the liquid material is distributed along the surface of the component.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: June 15, 1999
    Assignee: Form Factor, Inc.
    Inventors: Benjamin N. Eldridge, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 5897326
    Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150.degree. C., and can be completed in less than 60 minutes.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: April 27, 1999
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu