Patents Represented by Attorney David V. Seed IP Law Group PLLC Carlson
  • Patent number: 6137540
    Abstract: This invention relates to the color matching function used in connection with the luminance or white stretch function in a television video processor. Automatic adjustment in the amplitude of the color difference signals is provided to compensate for the effect of the stretch of the luminance signal in a provision called color matching. The general principal of color matching being, any percentage change in the amplitude of the luminance signal due to the white stretch effect, must be balanced by the same percentage changes in the color difference signal so that the ratio of the color signals can be maintained after matrixing. This accomplished by compensating the color difference signals by a varying amount that decreases with increasing the input luminance signal level when the level of the input luminance signal is above said selected threshold.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: October 24, 2000
    Assignee: STMicroelectronics Asia Pacific PTE Limited
    Inventors: Yann Desprez-Le Goarant, Loo Kah Chua
  • Patent number: 6130572
    Abstract: A negative charge pump circuit comprises a plurality of charge pump stages connected in series to each other. Each stage has a stage input terminal and a stage output terminal. A first stage has the stage input terminal connected to a reference voltage, a final stage has the stage output terminal operatively connected to an output terminal of the charge pump at which a negative voltage is developed; intermediate stages have the respective stage input terminal connected to the stage output terminal of a preceding stage and the respective stage output terminal connected to the stage input terminal of a following stage.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: October 10, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Andrea Ghilardelli, Jacopo Mulatti, Maurizio Branchetti
  • Patent number: 6127873
    Abstract: A feedforward circuit structure with programmable zeros for synthesizing continuous-time filters, delay lines, and the like is described. The circuit comprises a first cell and a second cell which are cascade-connected. Each one of the first and second cells comprises first and second pairs of bipolar transistors. The emitter terminals of the first pair of transistors are connected to a first current source, and the emitter terminals of the second pair of transistors are connected to a second current source. A first high-impedance element is connected between the first and second pairs of transistors, and a second high-impedance element is connected at an output of the second pair of transistors. A fifth transistor is connected between the collector terminal of a first transistor of the first pair of transistors and the collector terminal of a second transistor of the second pair of transistors.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: October 3, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Salvatore Portaluri, Valerio Pisati
  • Patent number: 6121802
    Abstract: A circuit and a method generate first and second triangular waveforms opposite in phase to each other. The circuit includes a capacitor having a first plate coupled to a first output at which the first triangular waveform is produced and a second plate coupled to a second output at which the second triangular waveform is produced. First and second switches are coupled between a first voltage reference and the first and second plates, respectively, of the capacitor. The circuit also includes a controller having a first output coupled to the control terminal of the first switch and a second output coupled to a controlled terminal of a second switch. The controller is structured to produce at the first and second outputs respective first and second control signals in opposition to each other and thereby control the first and second switches in opposition to each other.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: September 19, 2000
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Giuseppe Luciano, Luca Schillaci
  • Patent number: 6110353
    Abstract: An apparatus for increasing the quantity of dissolved oxygen in water. The apparatus includes an inlet for receiving untreated water. A cell housing having an electrolytic cell therein is coupled to the inlet. A resident time housing is connected to the cell housing for receiving water having oxygen and hydrogen gas therein. The resident time housing is vertically oriented and longitudinally tending for a selected vertical length above the cell housing. This provides sufficient resident time of the water in a quiet zone to permit the generated oxygen gas to transition into the dissolved state prior to reaching the top of the resident time housing. An outlet is provided at the top of the resident time housing. Treated water having a high dissolved oxygen content is delivered out of the outlet. A gas vent is provided at the outlet to permit the escape of hydrogen or other gases which have not been dissolved into the water.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: August 29, 2000
    Assignee: H20 Technologies, Ltd.
    Inventor: Gary S. Hough
  • Patent number: 6106571
    Abstract: A method and apparatus for producing a plurality of unique instrumentation tags for testing and debugging a computer program. The tags have a value equal to the combination of an offset and a base. The value for a tag offset is first determined. The tag is then inserted into an area of interest within the source code being instrumented. The base value is set when the object code for the computer program is linked to form executable code. The base value is resolved such that each tag has a unique value in comparison with any other tag. The source code being instrumented with tagging statements can reside on more than one computer. Moreover, the instrumented source code can be compiled on more than one computer. The unique value associated with each tagging statement is recorded in an instrumentation database, which facilitates observation of the instrumented program during its execution.
    Type: Grant
    Filed: January 29, 1998
    Date of Patent: August 22, 2000
    Assignee: Applied Microsystems Corporation
    Inventor: Sidney R. Maxwell
  • Patent number: 6104728
    Abstract: A device for selection of address words, each having n bit locations and serving for addressing m different receiving locations of a digital communications apparatus, comprising a digital acceptance device via which address words can be selected which are acceptable for the particular receiving location in consideration. The acceptance device includes an address word segmenting device through which each address word received by the receiving location is subdivided into s address word segments with b segment bit locations each, wherein b=n/s and n is an integral multiple of s, a decoder having a decoder input accepting the bit pattern of the address word segment of the particular address word being examined for acceptance, and having a decoder output at which, for each of the possible segment bit patterns, a decoder output bit pattern representing only this segment bit pattern is available.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: August 15, 2000
    Assignee: STMicroelectronics GmbH
    Inventor: Peter Heinrich
  • Patent number: 6100747
    Abstract: The device permits selection between two design options of an integrated circuit by causing a corresponding circuit unit of the integrated circuit to adopt one of two possible different operative states. More specifically, the device provides an inverter, of which the output terminal is connected to the control terminal of the circuit unit and the input terminal is connected to first and second supply terminals, via a conductor and a capacitor, respectively. The conductor can be broken by means outside the integrated circuit, and the capacitor is connected in parallel with a diode connected for reverse conduction. The device does not require control signals, takes up a very small area, has practically zero consumption, and can be formed in unlimited numbers on the same integrated circuit.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: August 8, 2000
    Assignee: STMicroelectronics, S.r.l.
    Inventor: Pierangelo Confalonieri
  • Patent number: 6098934
    Abstract: The apparatus and method of this invention provide a versatile and convenient way to feed infants in a hands free manner while the infant is being transported, especially when being transported in an infant carrier seat. The invention provides a drinking container support apparatus comprised of a wedge shaped member, a drinking container retaining member and an strap for attaching the drinking container support apparatus to a carrier seat. The invention further provides for user selected adjustment of a drinking container to a position that is convenient and accessible to an infant. Another aspect of this invention is a method for feeding an infant while the infant is seated in an infant carrier seat by use of a drinking container support apparatus.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: August 8, 2000
    Inventor: Christie Lynn Skelton
  • Patent number: 6097633
    Abstract: A read circuit for non-volatile memories having an array section, with a corresponding bitline, and a reference section, with a corresponding reference bitline. A differential amplifier for comparing voltage signals obtained by current/voltage conversion of a current signal of an array cell and of a reference current signal is connected to the respective bit lines. A cascode transistor for each one of the array and reference sections, each driven by a NOR logic gate; a charge transistor for the bitline and a charge transistor for the reference bitline; column decoding transistors for the array section and for the reference section; the circuit further comprising an additional transistor which is connected between the NOR gate of the array side and a node for acquiring the array voltage sent to the differential amplifier, the additional transistor increasing the speed of the process for reading the bitline when the bitline is not charged.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: August 1, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventor: Michele La Placa
  • Patent number: 6094022
    Abstract: A BEMF detector and method detect the BEMF of a three-phase motor using a fully differential detection system. The motor has a first coil coupled between a first coil tap and a center tap, a second coil coupled between a second coil tap and the center tap, and a third coil coupled between a third coil tap and the center tap. The BEMF detector includes a differential amplifier having first and second inputs and first and second outputs, with the first input being coupled to one of the coil taps and the second input being coupled to the center tap. The BEMF detector also includes a comparator having first and second inputs coupled respectively to the first and second outputs of the differential amplifier and an output at which a BEMF signal is produced that is related to the BEMF of the motor. The differential amplifier may be part of an anti-alias filter structured to fix to a known stable value a common mode at the outputs of the differential amplifier.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: July 25, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Schillaci, Maurizio Nessi, Giacomino Bollati, Ezio Galbiati
  • Patent number: 6078462
    Abstract: The device is to be used with a parallel architecture partial response maximum likelihood (PRML) reading apparatus comprising a variable-gain input amplifier, a low-pass analog filter, a transversal continuous-time analog filter and two distinct and parallel processing channels interposed between the transversal analog filter and an RLL-NRZ decoder. The two processing channels comprise respective analog-digital converters and respective Viterbi detectors and operate according to sampling sequences that alternate with one another. The device for processing the servo signals comprises a rectifier connected to the outputs of the analog-digital converters and an integrator.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: June 20, 2000
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Maurizio Zuffada, Paolo Gadducci, David Moloney, Valerio Pisati
  • Patent number: 6071263
    Abstract: A method and apparatus for retaining a catheter tip in a fixed position within a blood flow and preventing it from contacting a blood vessel wall. The apparatus includes a tip retainer at the distal end of the catheter that anchors the tip of the catheter within the blood vessel. The catheter tip is retained within the blood vessel spaced from the wall to ensure that it does not contact the wall of the blood vessel. This reduces damage to the blood vessel caused by chronic movement and contact between the catheter tip and the wall of the blood vessel. In one embodiment, the tip retainer includes a prong that penetrates the wall of the blood vessel, thus preventing the catheter tip from moving longitudinally within the blood vessel. In alternative embodiments, the tip retainer contacts the wall but does not penetrate the wall.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 6, 2000
    Inventor: Thomas R. Kirkman
  • Patent number: 6071786
    Abstract: A method of manufacturing a bipolar transistor in an integrated circuit including the steps of forming a P-type base area, coating this base area with an isolating layer, and forming an opening in the isolating layer at a location where it is desired to form the emitter region. The method further includes coating the structure with an N-type doped polysilicon layer, etching the polysilicon layer to delimit a portion therefrom, forming spacers at a periphery of the polysilicon portion, and implanting a P-type dopant to form a base contact making region, after masking the polysilicon portion, above the area where it is in contact with the base area.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: June 6, 2000
    Assignee: STMicroelectronics, S.A.
    Inventor: Michel Laurens
  • Patent number: 6069513
    Abstract: A toggle flip-flop with reduced integration area, comprising a flip-flop of the D-type with an inverting input stage and a master-slave portion. Three transistors connected to the inverting stage form a logic gate of the XOR type whereto the output terminal of the master-slave portion is fed back.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: May 30, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Annamaria Rossi, Giona Fucili, Marcello Leone, Maurizio Nessi
  • Patent number: 6069399
    Abstract: A transistor including an epitaxial layer with a first conductivity type, a base buried region with a second conductivity type, and a sinker base region with the second conductivity type which extends from a main surface of the transistor to the base buried region, and delimits, together with the base buried region, emitter fingers in the epitaxial layer. The transistor further includes an emitter buried region with the first conductivity type and a doping level which is higher than that of the epitaxial layer. The emitter buried region is embedded in the epitaxial layer in a position adjacent to the base buried region. A sinker emitter region having the first conductivity type and a doping level which is higher than that of the epitaxial layer and extends from the main surface to the emitter buried region inside the emitter fingers.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: May 30, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventor: Davide Patti
  • Patent number: 6040734
    Abstract: A circuit for switching between supply voltages and in particular for non-volatile flash memory devices and of the type comprising a first and a second circuit branch each incorporating a pair of transistors connected in series provides that at least one branch of the circuit be structured with a bridge circuit made up of P-channel MOS transistors. The bridge is made of a first and a second pairs of transistors connected between a first supply voltage reference and a common node. The first pair comprises transistors bigger than the transistors of the second pair while between the transistors making up the second pair is inserted a pair of resistors. Between the pair of resistors there is an interconnection node connected to a corresponding interconnection node between the transistors of the first pair.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: March 21, 2000
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Corrado Villa, Luigi Bettini, Simone Bartoli
  • Patent number: 6040609
    Abstract: Process for integrating in a same MOS technology devices with different threshold voltages. Simultaneously forming on a semiconductor material layer of at least two gate electrodes for at least two MOS devices, said gate electrodes comprising substantially rectilinear portions and corners, each gate electrode having a respective corner density for unit area. Selectively introducing in the semiconductor material layer a dopant for the simultaneous formation of respective channel regions for said at least two MOS devices, said channel regions extending under the respective gate electrode, said selective introduction using as a mask the respective gate electrodes so that said channel regions have, at the corners of the respective gate electrode, a dopant concentration lower than that at the substantially rectilinear portions.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: March 21, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ferruccio Frisina, Davide Bolognesi, Angelo Magri'