Patents Represented by Attorney Davod J. Paul
  • Patent number: 7037775
    Abstract: A process for forming active transistors for a semiconductor memory device by the steps of: forming transistor gates having generally vertical sidewalls in a memory array section and in periphery section; implanting a first type of conductive dopants into exposed silicon defined as active area regions of the transistor gates; forming temporary oxide spacers on the generally vertical sidewalls of the transistor gates; after the step of forming temporary spacers, implanting a second type of conductive dopants into the exposed silicon regions to form source/drain regions of the active transistors; after the step of implanting a second type of conductive dopants, growing an epitaxial silicon over exposed silicon regions; removing the temporary oxide spacers; and forming permanent nitride spacers on the generally vertical sidewalls of the transistor gates.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: May 2, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Chih-Chen Cho, Er-Xuan Ping