Patents Represented by Attorney Deborah W Wenocur
  • Patent number: 8199879
    Abstract: A system and method for forming an adjusted estimate of scattered radiation in a radiographic projection of a target object, which incorporates scattered radiation from objects adjacent to the target object, such as a patient table. A piercing point equalization method is disclosed, and a refinement of analytical kernel methods which utilizes hybrid kernels is also disclosed.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: June 12, 2012
    Assignee: Varian Medical Systems Inc.
    Inventors: Josh Star-Lack, Mingshan Sun
  • Patent number: 8024632
    Abstract: A method and apparatus are provided for detecting faults in a queue (also known as FIFO) in a digital system. The method augments the FIFO with an external monitoring mechanism which, on demand, checks the FIFO's operation and alerts the system to malfunctioning of the FIFO's control mechanism or corruption of data contained therein. The detection apparatus does not depend on the implementation of the FIFO; the checking is based solely on observing the data entering and exiting the FIFO. Furthermore, the apparatus works in a non-intrusive manner during a normal operation of the FIFO as part of the system. The method and apparatus allow for many variants, all derived from the same general scheme, and which allow different levels of protection against faults.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: September 20, 2011
    Inventor: Victor Konrad
  • Patent number: 7786436
    Abstract: An improved method, apparatus, and control/guiding software for localizing, characterizing, and correcting defects in integrated circuits, particularly open or resistive contact/via defects and metal bridging defects, using FIB technology. An apparatus for identifying an abnormal discontinuity in a contact/via in an integrated circuit comprising a focused ion beam system to scan the ion beam over the contact/via to do remove or deposit via material, a detector to collect a secondary particle signal from the contact/via material that gets removed, a sub-system for storing the secondary particle signal from the contact/via in time as well as x-y scan position, a sub-system for correlating secondary particle signals and identifying discontinuities in the correlated secondary particle signals, a sub-system for optimizing the display of the abnormal discontinuity; and a computer to implement software aspects of the system.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: August 31, 2010
    Assignee: DCG Systems, Inc.
    Inventors: Theodore R. Lundquist, Ketan Shah, Tamayasu Anayama, Mark A. Thompson
  • Patent number: 7585200
    Abstract: A detachable holder for securing small objects inside a brassiere that: can easily be inserted into and removed from a wide variety of brassieres; is washable and follows the configuration of the bra; secures the objects between a pocket in the holder and the bra cup; does not add aesthetically unpleasing bulges; and that can be constructed to be decorative or to further hold decorative additions.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: September 8, 2009
    Inventor: Laura McLaren
  • Patent number: 7488937
    Abstract: A method and system for registering a CAD layout to a Focused Ion Beam image for through-the substrate probing, without using an optical image and without requiring biasing, includes an improved method of trench endpointing during the FIB milling operation with a low beam energy. The method further includes removal of Ga at the trench floor using XeF2, as well as the deposition of an insulating layer onto the trench floor.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: February 10, 2009
    Assignee: Credence Systems Corp
    Inventors: Erwan Le Roy, William B. Thompson
  • Patent number: 7176433
    Abstract: A method and apparatus for improving system resolution for a defect line scanner while not increasing aliasing effects, or alternatively to maintain system resolution for a defect scanner while decreasing aliasing effects. This is accomplished by decreasing effective pixel size for a CCD array defect line scanner while not decreasing signal-to-noise ratio, with minimal changes to the current machine. The method utilizes a sampling phase shift between successive lines of a multi-line sensor array during scanning.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: February 13, 2007
    Assignee: KLA-Teacor Technologies Corporation
    Inventor: Eliezer Rosengaus
  • Patent number: 7115426
    Abstract: A method for utilizing interference fringe patterns generated when milling a trench through a semiconductor substrate by a method such as FIB milling, to determine and optimize the thickness uniformity of the trench bottom. The interference fringes may be mapped and the mapping used to direct the FIB milling to those regions which are thicker to correct observed non-uniformities in the trench floor thickness by varying the pixel dwell time across the milled area. The interference fringe mapping may be used to develop computerized contour lines to automate the pixel dwell time variations as described above, for correcting non-uniformities in the trench floor thickness. The method may be applied to applications other than trench formation for backside editing, such as monitoring progress in forming a milled object.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: October 3, 2006
    Assignee: Credence Systems Corporation
    Inventors: Erwan Le Roy, Patricia Le Coupanec, Theodore R. Lundquist, William B. Thompson, Mark A. Thompson, Lokesh Johri
  • Patent number: 7042647
    Abstract: A scanned optical system for use in optical probing applications provides a large Field of View (FOV) for objective lenses having high Numerical Aperture (NA), such as Solid Immersion Lenses (SIL's). This enables high resolution imaging of semiconductor devices for such applications as laser probing, TIVA/LIVA, OBIRCH, and photon emission timing analysis. A hybrid scanning optics configuration is disclosed to provide high resolution imaging over a small area along with low resolution imaging over a large area.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: May 9, 2006
    Assignee: Credence Systems Corporation
    Inventor: William K. Lo
  • Patent number: 7015468
    Abstract: A method of improving stability for CD-SEM measurements of photoresist, in particular 193 nm photoresist, and of reducing shrinkage of 193 nm photoresist during CD-SEM measurements. The photoresist is exposed to a dose of electrons or other stabilizing beam prior to or during CD measurement. One embodiment of the invention includes multiplexing of the SEM electron beam.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: March 21, 2006
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Amir Azordegan, Gian Francesco Lorusso, Ananthanarayanan Mohan, Mark Neil, Waiman Ng, Srini Vedula
  • Patent number: 6796697
    Abstract: An illumination delivery system provides a spatially and angularly uniform shaped beam output with sufficient intensity to illuminate a sample surface for defect inspection. Light is transmitted through a shaped fiber optic bundle, a homogenizer, a diffuser, and an optional focusing optics system.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: September 28, 2004
    Assignee: KLA-Tencor, Inc.
    Inventors: Chris Bragg, Daniel Scott, Eliezer Rosengaus
  • Patent number: 6670265
    Abstract: An integrated circuit wafer and a manufacturing process for etching low K spin-on dielectrics such as HSQ in a High Density Plasma etch reactor utilizes roof and wall temperature to improve across-the-wafer uniformity, and a mixture of C4F8 and C2F6 etch gases to eliminate mid via etch stop and to maintain selectivity over underlying etch-stop layers.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: December 30, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Fei Wang, James K. Kai, Angela T. Hui
  • Patent number: 6633083
    Abstract: A structure and method for determining barrier layer integrity for multi-level copper metallization structures in integrated circuit manufacturing. Novel testing structures prevent any conducting residues of the copper CMP from diffusing into the dielectric layer. Barrier layer integrity is tested by performing CV or IV measurements between the copper lines and the silicon wafer.
    Type: Grant
    Filed: February 28, 2000
    Date of Patent: October 14, 2003
    Assignee: Advanced Micro Devices Inc.
    Inventors: Christy Mei-Chu Woo, Young-Chang Joo, Todd Lukanc
  • Patent number: D602687
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: October 27, 2009
    Inventors: Jeffrey J. Castaline, Hiroyuki Kobayashi
  • Patent number: D604658
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: November 24, 2009
    Inventors: Jeffrey J. Castaline, Hiroyuki Kobayashi
  • Patent number: D604661
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: November 24, 2009
    Inventor: Ray Nichol
  • Patent number: D609596
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: February 9, 2010
    Inventor: Ray Nichol
  • Patent number: D622628
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: August 31, 2010
    Inventors: Jeffrey J. Castaline, Hiroyuki Kobayashi
  • Patent number: D651048
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: December 27, 2011
    Inventor: Scott D. Gold
  • Patent number: D671365
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: November 27, 2012
    Inventor: Scott D. Gold