Patents Represented by Attorney, Agent or Law Firm Derek S. Jennings, Esq.
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Patent number: 6784862Abstract: An active matrix display device has an inspection circuit for inspecting the image quality. The inspection circuit includes a plurality of input terminals for inputting a test signal and a plurality of test transistors connected respectively to the input terminals. Input test signals which are to be sent to sub pixel sections from the individual input terminals are controlled by the associated test transistors to display a desired test screen. The test transistors are preferably amorphous silicon TFTs.Type: GrantFiled: March 14, 2001Date of Patent: August 31, 2004Assignee: International Business Machines CorporationInventors: Manabu Kodate, Masato Ikeda
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Patent number: 6600196Abstract: The present invention relates to minimizing a leakage current in a floating island portion formed in a thin film transistor. More specifically, the present invention is directed to a thin film transistor including: a source electrode 14 and a drain electrode 15 disposed above an insulating substrate 11 at a predetermined interval; an s-Si film 16 disposed in relation to the source electrode 14 and drain electrode 15; a gate insulating film 17 overlapping the a-Si film 16; and a gate electrode 18 overlapping the gate insulating film 17, in which the a-Si film 16 is disposed between the source electrode 14 and the drain electrode 15 and has a floating island portion 20 above which or beneath which the gate electrode 18 is not formed, and boron ions are implanted into this portion to form a boron-ion-implanted region 19.Type: GrantFiled: January 16, 2001Date of Patent: July 29, 2003Assignee: International Business Machines CorporationInventors: Takatoshi Tsujimura, Osamu Tokuhiro, Mitsuo Morooka, Takashi Miyamoto
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Thin film transistor, liquid crystal display panel, and manufacturing method of thin film transistor
Patent number: 6576925Abstract: The present invention relates to minimizing a leakage current in a floating island region formed in a thin film transistor, and to maintaining a large ON-current required for an operation of the TFT. More specifically, the present invention is directed to a thin film transistor includes: a gate electrode 18 disposed above an insulating substrate and formed in a predetermined pattern; an a-Si film 16 formed in accordance with the pattern of the gate electrode 18; a source electrode 14 formed via the a-Si film 16; and a drain electrode 15 disposed at a predetermined interval from the source electrode 14.Type: GrantFiled: February 2, 2001Date of Patent: June 10, 2003Assignee: International Business Machines CorporationInventors: Takatoshi Tsujimura, Kohichi Miwa -
Patent number: 6539460Abstract: A computing system includes a storage server having a memory organization that includes a compressed memory device for storing sectors, each sector having a sector data portion and associated header and trailers, either attached by the hosts or by components of the computing system. The compressed memory device comprises a memory directory and a plurality of fixed-size blocks. The system implements a methodology for detaching headers and trailers from sectors before storing the sectors in the memory, and storing the headers and trailers in the memory disk cache, separate from the sector data portion; and, reattaching headers and trailers to sector data portions when the sectors are sent from the memory to a host or to a mass storage device. The header and trailer data are managed through the same memory directory used to manage the compressed main memory.Type: GrantFiled: January 19, 2001Date of Patent: March 25, 2003Assignee: International Business Machines CorporationInventors: Vittorio Castelli, Peter A. Franaszek, Philip Heidelberger, John T. Robinson
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Patent number: 6519733Abstract: In a processing system having a main memory, wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies, a method and apparatus for providing compressed data integrity verification to insure detection of nearly any data corruption resulting from an anomaly anywhere in the logical processing or storage of compressed information. A cyclic redundancy code (CRC) is computed over a compressed data block as the data enters the compressor hardware, and the CRC is appended to the compressor output block before it is stored into the main memory. Subsequent read access results in comparing the CRC against a recomputation of the CRC as the block is uncompressed from the main memory. Any CRC miscompare implies an uncorrectable data error condition that may be used to interrupt the system operation.Type: GrantFiled: February 23, 2000Date of Patent: February 11, 2003Assignee: International Business Machines CorporationInventors: David Har, Kwok-Ken Mak, Charles O. Schulz, T. Basil Smith, III, R. Brett Tremaine
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Patent number: 6469722Abstract: The present invention is directed to explaining functions with a rich graphical expression even when the number of kinds of functions required for a software increases. More particularly, a plurality of function areas 201-223 are defined in a composite icon area of the present invention. An appearance image is associated to each function area and, when a mouse pointer comes across a function area, appearance images associated to that function area are displayed as appearance images of a composite icon. A function is also associated to each function area and, when a mouse is clicked on a function area, a function which is associated to that function area is executed. The set of the function area may be changed by changing the size of a composite icon, an operation to switch the group of functions, or selection of an object to be operated upon.Type: GrantFiled: January 29, 1999Date of Patent: October 22, 2002Assignee: International Business Machines CorporationInventors: Yohsuke Kinoe, Kohsuke Okamoto, Naofumi Muranaka, Tsukasa Takemura, Minako Matsuda, Norimasa Uchiyama
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Patent number: 6417789Abstract: A highly-efficient system and methodology for organizing, storing and/or transmitting compressed data that achieves optimum compression throughput, enhances overall data compressibility, and reduces decompression latency.Type: GrantFiled: May 12, 2000Date of Patent: July 9, 2002Assignee: International Business Machines CorporationInventors: David Har, Kwok-Ken Mak, Charles O. Schulz